Integrated assemblies which include two different types of silicon nitride, and methods of forming integrated assemblies

Patent metadata

Field	Value
Publication number	US-10957699-B2
Application number	US-201916378075-A
Country	US
Kind code	B2
Filing date	Apr 8, 2019
Priority date	Apr 8, 2019
Publication date	Mar 23, 2021
Grant date	Mar 23, 2021

Abstract

Some embodiments include an integrated assembly which has bitline structures that extend along a first direction. The bitline structures include conductive bitlines, and include insulative shells which extend over the conductive bitlines and along sidewalls of the conductive bitlines. The insulative shells include a first silicon nitride composition. The bitline structures are spaced from one another by intervening regions. Semiconductor structures and insulative spacers are within the intervening regions. The semiconductor structures and insulative spacers alternate with one another along the first direction. The insulative spacers include a second silicon nitride composition which is characterized as having a faster etch rate than the first silicon nitride composition by a mixture which contains sulfuric acid and hydrogen peroxide. Some embodiments include methods of forming integrated assemblies.

First claim

I claim:

1. An integrated assembly, comprising:
bitline structures extending along a first direction; the bitline structures comprising conductive bitlines, and comprising insulative materials covering the conductive bitlines; the insulative materials comprising a first silicon nitride composition; the bitline structures being spaced from one another by intervening regions;
conductive materials and insulative spacers within the intervening regions; the insulative spacers comprising a second silicon nitride composition characterized as having a faster etch rate than the first silicon nitride composition;
storage elements coupled with the semiconductor structures;
access transistors coupled with storage elements through the semiconductor structures; and
conductive wordlines coupled with gates of the access transistors; each of the storage elements being uniquely addressed through a combination of one of the conductive bitlines and one of the conductive wordlines.

2. The integrated assembly of claim 1 , wherein the second silicon nitride composition is characterized as having a faster etch rate than the first silicon nitride composition by a mixture comprising sulfuric acid and hydrogen peroxide.

3. The integrated assembly of claim 1 , wherein the second silicon nitride composition contains boron therein and the first silicon nitride composition is free from containing boron therein.

4. The integrated assembly of claim 1 wherein as the insulative spacers extend within the intervening regions, the configuration of the insulative spacers tapers.

5. The integrated assembly of claim 1 , wherein the second silicon nitride composition is lower in density than the first silicon nitride composition.

6. An integrated assembly, comprising:
linear structures extending along a first direction; the linear structures comprising conductive lines, and comprising insulative shells extending over the conductive lines and along sidewalls of the conductive lines; the insulative shells comprising a first silicon nitride composition which consists of silicon and nitrogen; the linear structures being spaced from one another by intervening regions;
semiconductor structures and insulative spacers within the intervening regions; the semiconductor structures and the insulative spacers alternating with one another along the first direction; the insulative spacers comprising a second silicon nitride composition which includes silicon, nitrogen and boron;
storage elements coupled with the semiconductor structures;
access transistors coupled with storage elements through the semiconductor structures; and
conductive wordlines coupled with gates of the access transistors; each of the storage elements being uniquely addressed through a combination of one of the conductive bitlines and one of the conductive wordlines.

7. The integrated assembly of claim 6 wherein as the insulative spacers extend within the intervening regions, the configuration of the insulative spacers tapers.

8. The integrated assembly of claim 6 wherein the semiconductor structures comprise conductively-doped silicon.

9. The integrated assembly of claim 8 further comprising capacitors coupled with the semiconductor structures.

10. The integrated assembly of claim 6 wherein each of the insulative spacers includes a second region of the second silicon nitride composition in combination with a first region of the first silicon nitride composition.

11. The integrated assembly of claim 6 wherein the boron is present in the second silicon nitride composition to a concentration within a range of from about 20 atomic percent to about 30 atomic percent.

12. The integrated assembly of claim 10 wherein the second regions only partially surround lateral peripheries of the first regions.

13. The integrated assembly of claim 10 wherein the second regions entirely surround lateral peripheries of the first regions.

14. The integrated assembly of claim 10 wherein the second regions extend at least partially around the first regions.

15. The integrated assembly of claim 10 wherein the first regions extend at least partially around the second regions.

16. An integrated assembly, comprising:
bitline structures extending along a first direction; the bitline structures comprising conductive bitlines, and comprising insulative shells extending over the conductive bitlines and along sidewalls of the conductive bitlines; the insulative shells comprising a first silicon nitride composition; the bitline structures being spaced from one another by intervening regions;
semiconductor structures and insulative spacers within the intervening regions; the semiconductor structures and the insulative spacers alternating with one another along the first direction; the insulative spacers comprising a second silicon nitride composition characterized as having a faster etch rate than the first silicon nitride composition by a mixture comprising sulfuric acid and hydrogen peroxide;
storage elements coupled with the semiconductor structures;
access transistors coupled with storage elements through the semiconductor structures; and
conductive wordlines coupled with gates of the access transistors; each of the storage elements being uniquely addressed through a combination of one of the conductive bitlines and one of the conductive wordlines.

17. The integrated assembly of claim 16 wherein the first silicon nitride composition consists of silicon nitride, and wherein the second silicon nitride composition comprises silicon, nitrogen and boron.

18. The integrated assembly of claim 17 wherein the boron is present in the second silicon nitride composition to a concentration within a range of from about 20 atomic percent to about 30 atomic percent.

19. The integrated assembly of claim 16 wherein the first silicon nitride composition has a higher density than the second silicon nitride composition.

20. The integrated assembly of claim 19 formed by a process in which the first silicon nitride composition is deposited at a temperature of at least about 600° C. and the second silicon nitride composition is deposited at a temperature of no greater than about 500° C.

21. The integrated assembly of claim 16 wherein each of the insulative spacers includes a second region of the second silicon nitride composition in combination with a first region of the first silicon nitride composition.

22. The integrated assembly of claim 21 wherein the second regions extend at least partially around the first regions; and wherein each of the insulative spacers includes a third region of the first silicon nitride composition which at least partially surrounds the second region.

23. The integrated assembly of claim 16 wherein as the insulative spacers extend within the intervening regions, the configuration of the insulative spacers tapers.

24. The integrated assembly of claim 21 wherein the second silicon nitride composition of the insulative spacers is configured as a hollow ring.

25. The integrated assembly of claim 21 wherein the second silicon nitride composition of the insulative spacers is configured as a solid core.

26. The integrated assembly of claim 16 wherein the insulative shells are against the sidewalls of the conductive bitlines.

27. The integrated assembly of claim 16 wherein the insulative shells comprise a single-uninterrupted physical structure.

Assignees

• Micron Technology Inc

Inventors

• Ito Satomi

Classifications

• H01L27/10888

  Electricity · mapped topic

• H01L27/10897

  Electricity · mapped topic

• H01L27/10805

  Electricity · mapped topic

• H01L27/10885 Primary

  Electricity · mapped topic

• H10B12/02

  for one transistor one-capacitor [1T-1C] memory cells · CPC title