Integrated circuit devices including a boron-containing insulating pattern

Patent metadata

Field	Value
Publication number	US-10957647-B2
Application number	US-201916358212-A
Country	US
Kind code	B2
Filing date	Mar 19, 2019
Priority date	Aug 13, 2018
Publication date	Mar 23, 2021
Grant date	Mar 23, 2021

Abstract

Integrated circuit (IC) devices are provided. An IC device includes a substrate including an active region. The IC device includes a bit line on the substrate. The IC device includes a direct contact connected between the active region and the bit line. The IC device includes a contact plug on the substrate. Moreover, the IC device includes a boron-containing insulating pattern between the contact plug and the direct contact.

First claim

What is claimed is:

1. An integrated circuit device comprising:
a substrate comprising a first active region and a second active region that are spaced apart from each other;
a bit line that extends in a horizontal direction on the substrate;
a direct contact connected between the first active region and the bit line;
a contact plug that extends in a vertical direction on the substrate, the contact plug comprising an upper portion adjacent the bit line and a lower portion in contact with the second active region in the substrate; and
a boron-containing insulating pattern between the lower portion of the contact plug and the direct contact,
wherein the boron-containing insulating pattern comprises Si x B y N z , and
wherein 0.1≤x≤0.5, 0.1≤y≤0.5, and 0.1≤z≤0.8.

2. The integrated circuit device of claim 1 , wherein the boron-containing insulating pattern comprises a dielectric constant of 2 to 6.

3. The integrated circuit device of claim 1 , wherein the lower portion of the contact plug and the direct contact are both in contact with the boron-containing insulating pattern.

4. The integrated circuit device of claim 1 , further comprising an insulating region between the lower portion of the contact plug and the boron-containing insulating pattern and between the direct contact and the boron-containing insulating pattern,
wherein the insulating region comprises a lower dielectric constant than a dielectric constant of the boron-containing insulating pattern.

5. The integrated circuit device of claim 4 , wherein the insulating region comprises a silicon oxide film, an air spacer, or a combination thereof.

6. The integrated circuit device of claim 1 , wherein the boron-containing insulating pattern is buried in the substrate.

7. The integrated circuit device of claim 1 , further comprising a boron-containing insulating fence on a sidewall of the bit line,
wherein a boron content in the boron-containing insulating fence increases toward the bit line.

8. The integrated circuit device of claim 1 , further comprising a first insulating spacer and a second insulating spacer between the contact plug and the bit line on the boron-containing insulating pattern, the first insulating spacer and the second insulating spacer comprising different respective materials,
wherein each of the first insulating spacer and the second insulating spacer is free of boron.

9. The integrated circuit device of claim 8 , further comprising an insulating fence extending in the vertical direction on the substrate, the insulating fence being in line with the contact plug in the horizontal direction,
wherein the first insulating spacer and the second insulating spacer extend between the bit line and the insulating fence.

10. The integrated circuit device of claim 8 , wherein each of the first insulating spacer and the second insulating spacer surrounds a perimeter of the contact plug.

11. The integrated circuit device of claim 8 , further comprising an insulating fence extending in the vertical direction on the substrate, the insulating fence being in line with the contact plug in the horizontal direction,
wherein the first insulating spacer and the second insulating spacer extend between the contact plug and the insulating fence.

12. The integrated circuit device of claim 11 , further comprising a boron-containing insulating fence between the bit line and the insulating fence.

13. An integrated circuit device comprising:
a substrate comprising a plurality of active regions spaced apart from each other;
a bit line extending in a horizontal direction on the substrate;
a plurality of contact plugs spaced apart from each other along a horizontal line parallel to the bit line on the substrate;
a plurality of insulating fences that alternate with the plurality of contact plugs in the horizontal direction;
a direct contact connected between a first active region of the plurality of active regions and the bit line; and
a boron-containing insulating pattern between a first contact plug of the plurality of contact plugs and the direct contact.

14. The integrated circuit device of claim 13 ,
wherein the first contact plug is in contact with a second active region of the plurality of active regions in the substrate, and
wherein the first contact plug and the direct contact are both in contact with the boron-containing insulating pattern.

15. The integrated circuit device of claim 13 , further comprising an insulating film between the direct contact and the boron-containing insulating pattern and between the first contact plug and the boron-containing insulating pattern,
wherein the insulating film comprises a lower dielectric constant than a dielectric constant of the boron-containing insulating pattern.

16. An integrated circuit device comprising:
a substrate comprising a plurality of active regions;
a bit line extending in a horizontal direction on the substrate;
a direct contact connected between a first active region of the plurality of active regions and the bit line;
a first contact plug and a second contact plug that face each other with the bit line therebetween, wherein the first contact plug and the second contact plug are connected to a second active region and a third active region, respectively, of the plurality of active regions;
a first insulating fence and a second insulating fence that face each other with the bit line therebetween; and
a plurality of boron-containing insulating patterns comprising a first boron-containing insulating pattern between the direct contact and the first contact plug and a second boron-containing insulating pattern between the direct contact and the second contact plug,
wherein each of the plurality of boron-containing insulating patterns comprises a silicon boron nitride (SiBN) film.

17. The integrated circuit device of claim 16 ,
wherein each of the plurality of boron-containing insulating patterns comprises a dielectric constant of 2 to 6, and
wherein a boron content in the plurality of boron-containing insulating patterns increases toward the direct contact.

18. The integrated circuit device of claim 16 ,
wherein the first contact plug is in contact with the second active region and the first boron-containing insulating pattern, and
wherein the second contact plug is in contact with the third active region and the second boron-containing insulating pattern.

19. The integrated circuit device of claim 16 , further comprising an insulating film between the direct contact and the first boron-containing insulating pattern and between the direct contact and the second boron-containing insulating pattern,
wherein the insulating film comprises a lower dielectric constant than a dielectric constant of at least one of the first boron-containing insulating pattern or the second boron-containing insulating pattern.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Dong-Kak
• Son Yoon-Ho
• Lee Mong-Sup
• Yi Wook-Yeol

Classifications

• H10W20/083

  the openings being via holes penetrating underlying conductors · CPC title

• H10W20/076

  in via holes or trenches · CPC title

• H10W20/075

  of multilayered thin functional dielectric layers · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title

• H10W10/0145

  of trenches having shapes other than rectangular or V-shape (H10W10/0143 takes precedence) · CPC title