Image sensor including a transparent conductive layer in a trench

Patent metadata

Field	Value
Publication number	US-10944943-B2
Application number	US-201916392916-A
Country	US
Kind code	B2
Filing date	Apr 24, 2019
Priority date	Aug 29, 2018
Publication date	Mar 9, 2021
Grant date	Mar 9, 2021

Abstract

An image sensor is disclosed. The image sensor includes a substrate including an active region and a dummy region, a plurality of unit pixels on the active region, a transparent conductive layer on a first surface of the substrate, a light-blocking layer on the transparent conductive layer and electrically connected to the transparent conductive layer, the light-blocking layer having a grid structure adjacent light transmission regions, and a pad electrically connected to the light-blocking layer, on the dummy region.

First claim

What is claimed is:

1. An image sensor, comprising:
a substrate comprising an active region and a dummy region;
a plurality of unit pixels on the active region;
a transparent conductive layer on a first surface of the substrate;
a light-blocking layer on the transparent conductive layer and electrically connected to the transparent conductive layer, the light-blocking layer having a grid structure adjacent light transmission regions; and
a pad electrically connected to the light-blocking layer, wherein the pad is on the dummy region,
wherein a vertical portion of the transparent conductive layer is in a trench that is adjacent at least one of the plurality of unit pixels, and
wherein a sidewall of the vertical portion of the transparent conductive layer in the trench is slanted with respect to a horizontal portion of the transparent conductive layer that is substantially parallel to the first surface.

2. The image sensor of claim 1 , further comprising:
a device isolation pattern in the trench that is adjacent at least one of the plurality of unit pixels.

3. The image sensor of claim 2 , wherein the device isolation pattern is interposed between the first surface and the transparent conductive layer.

4. The image sensor of claim 2 , wherein a depth of the trench is less than a thickness of the substrate.

5. The image sensor of claim 2 , further comprising:
a conductive pattern in the trench; and
a planarization layer between the first surface and the transparent conductive layer,
wherein the transparent conductive layer comprises a contact portion which penetrates the planarization layer on the dummy region, and
wherein the contact portion is electrically connected to the conductive pattern.

6. The image sensor of claim 1 , wherein the vertical portion is vertically overlapped with the grid structure of the light-blocking layer.

7. The image sensor of claim 1 , further comprising:
color filters on the light-blocking layer; and
micro lenses on respective ones of the color filters.

8. The image sensor of claim 1 , wherein each of the plurality of unit pixels comprises a photoelectric conversion region.

9. The image sensor of claim 1 , further comprising:
transfer transistors and logic transistors on a second surface of the substrate; and
interconnection lines in an interlayered insulating layer on the second surface,
wherein the interconnection lines are electrically connected to the transfer and logic transistors.

10. An image sensor, comprising:
a substrate comprising a first surface and a second surface opposite to the first surface;
a first device isolation pattern on the first surface, the first device isolation pattern in a trench adjacent a plurality of unit pixels in the substrate;
a transparent conductive layer on the first device isolation pattern; and
a light-blocking layer on the transparent conductive layer,
wherein a depth of the trench is less than a thickness of the substrate,
wherein the transparent conductive layer includes a horizontal portion on the first surface and a vertical portion extending from the horizontal portion into the trench,
wherein the first device isolation pattern is between the vertical portion and the trench, and covers a bottom of the vertical portion, and
wherein the light-blocking layer is electrically connected to the horizontal portion.

11. The image sensor of claim 10 ,
wherein the light-blocking layer has a grid structure adjacent light transmission regions, and
wherein the light transmission regions are vertically overlapped with the plurality of unit pixels, respectively.

12. The image sensor of claim 11 , further comprising:
color filters on the light-blocking layer; and
micro lenses on respective ones of the color filters.

13. The image sensor of claim 10 , wherein a negative voltage is applied from the horizontal portion to the vertical portion of the transparent conductive layer through the light-blocking layer.

14. The image sensor of claim 10 , further comprising:
a second device isolation pattern on the second surface to define a plurality of active patterns; and
an interconnection line provided in an interlayered insulating layer on the second surface and electrically connected to the active pattern.

15. An image sensor, comprising:
a substrate comprising a first surface and a second surface opposite to the first surface;
a trench defining a plurality of unit pixels in the substrate; and
a transparent conductive layer on the first surface of the substrate,
wherein the transparent conductive layer comprises a vertical portion in the trench, and
wherein a width of the vertical portion adjacent to the first surface is greater than a width of the vertical portion that is adjacent to and below the second surface of the substrate.

16. The image sensor of claim 15 , further comprising:
a light-blocking layer on the transparent conductive layer and electrically connected to the transparent conductive layer,
wherein the light-blocking layer has a grid structure adjacent light transmission regions, which are vertically overlapped with the plurality of unit pixels, respectively, and
wherein the vertical portion is vertically overlapped with the grid structure of the light-blocking layer.

17. The image sensor of claim 16 , further comprising:
a pad provided on a peripheral region of the substrate and electrically connected to the light-blocking layer.

18. The image sensor of claim 15 , wherein the transparent conductive layer further comprises:
a horizontal portion parallel to the first surface.

19. The image sensor of claim 15 , further comprising:
a device isolation pattern between the substrate and the transparent conductive layer,
wherein the device isolation pattern at least partially fills the trench.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Sang-Hoon
• Park Byungjun

Classifications

• H04N25/617

  for reducing electromagnetic interference, e.g. clocking noise · CPC title

• H04N25/766

  comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power · CPC title

• H04N25/11 Primary

  Arrangement of colour filter arrays [CFA]; Filter mosaics · CPC title

• H10F39/811

  Interconnections · CPC title

• H10F39/8063

  Microlenses · CPC title