Solid state imaging device, method of manufacturing the same, and imaging apparatus

US9509929B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9509929-B2
Application numberUS-201514747241-A
CountryUS
Kind codeB2
Filing dateJun 23, 2015
Priority dateOct 3, 2007
Publication dateNov 29, 2016
Grant dateNov 29, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A solid state imaging device including: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sections in order to form a hole accumulation layer on light receiving surfaces of the sensor sections.

First claim

Opening claim text (preview).

What is claimed is: 1. An imaging apparatus comprising: a condensing optical section that condenses incident light; a solid state imaging device that receives the light condensed in the condensing optical section and performs photoelectric conversion of the received light; and a signal processing section that processes a signal photoelectrically converted, wherein the solid state imaging device includes: (a) a sensor section formed in a semiconductor substrate in order to convert incident light into an electric signal; and (b) a layer having negative fixed electric charges that is formed on a light incident side of the semiconductor substrate, wherein the N-type impurity region is formed between at least a portion of a peripheral circuit section and at least a portion of the layer having negative fixed electric charges. 2. The imaging apparatus according to claim 1 , wherein the layer having negative fixed electric charges is a hafnium oxide (HfO 2 ) layer, an aluminium oxide (Al 2 O 3 ) layer, a zirconium oxide (ZrO 2 ) layer, a tantalum oxide (Ta 2 O5) layer, or a titanium oxide (TiO 2 ) layer. 3. The imaging apparatus according to claim 1 , wherein: the layer having negative fixed electric charges is formed on the light receiving surface of the sensor section formed in the semiconductor substrate. 4. The imaging apparatus according to claim 1 , further comprising: a plurality of sensor sections, wherein the plurality of sensor sections convert incident light into an electric signal, and wherein the plurality of sensor sections form a pixel array section; and a wiring layer provided on a surface of the semiconductor substrate formed with the pixel array section, wherein the solid state imaging device is a back illuminated solid state imaging device, and wherein the light incident surface is on a side of the semiconductor substrate opposite the surface of the semiconductor substrate on which the wiring layer is formed. 5. The imaging apparatus according to claim 1 , further comprising: a light shielding layer, wherein at least a portion of the layer having negative fixed electric charges is between the light shielding layer and the N-type impurity region. 6. The imaging apparatus according to claim 5 , further comprising: a diffusion layer, wherein the diffusion layer is between the N-type impurity region and the peripheral circuit section.

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What does patent US9509929B2 cover?
A solid state imaging device including: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sectio…
Who is the assignee on this patent?
Sony Corp
What technology area does this patent fall under?
Primary CPC classification H10F39/199. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).