Semiconductor device

Patent metadata

Field	Value
Publication number	US-10937874-B2
Application number	US-201616323373-A
Country	US
Kind code	B2
Filing date	Aug 10, 2016
Priority date	Aug 10, 2016
Publication date	Mar 2, 2021
Grant date	Mar 2, 2021

Abstract

A semiconductor device includes: a gate electrode groove formed in contact with a drift region, a well region, and a source region; a gate electrode formed on a surface of the gate electrode groove via an insulating film; a source electrode groove in contact with the gate electrode groove; a source electrode electrically connected to a source region; and a gate wiring electrically insulated from the source electrode and formed inside the source electrode groove in contact with the gate electrode.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a substrate;
a drift region of a first conductivity type provided on a first main surface of the substrate and having a higher impurity concentration than the substrate;
a source electrode groove formed from a second main surface of the drift region in a direction perpendicular to the second mains surface, the second main surface being opposite from the first main surface;
a well region of a second conductivity type in contact with a side surface of the source electrode groove and formed inside the drift region at least partially;
a source region of the first conductivity type in contact with a side surface of the source electrode groove and formed inside the well region;
a source electrode electrically connected to the source region;
a gate electrode groove Ruined from the second main surface in the perpendicular direction so as to be in contact with the drift region, the well region, and the source region;
a gate insulating film formed on a surface of the gate electrode groove;
a gate electrode formed on a surface of the gate insulating film;
a drain region of the first conductivity type formed inside the drift region away from the well region; and
a drain electrode electrically connected to the drain region, wherein
the gate electrode groove is formed in contact with the source electrode groove, and
the semiconductor device further comprises a gate wiring electrically insulated from the source electrode and formed inside the source electrode groove in contact with the gate electrode.

2. The semiconductor device according to claim 1 , wherein the source electrode groove is formed more deeply than the gate electrode groove.

3. The semiconductor device according to claim 1 , wherein the gate wiring is formed in contact with the substrate via an insulating film.

4. The semiconductor device according to claim 1 , further comprising:
an interlayer insulating film formed on the second main surface;
a source wiring electrically connected to the source electrode; and
a drain wiring electrically connected to the drain electrode,
wherein the source wiring and the drain wiring are formed on a main surface of the interlayer insulating film opposite from and parallel to the second main surface.

5. The semiconductor device according to claim 1 , wherein the substrate is made of an insulator or a semi-insulator.

6. The semiconductor device according to claim 1 , wherein the gate electrode and the gate wiring are formed of the same material.

7. The semiconductor device according to claim 1 , wherein the gate wiring is formed of silicon and electrically insulated from the source electrode by a silicon oxide film formed on a surface of the gate wiring.

8. The semiconductor device according to claim 1 , wherein the drift region is made of a wide-bandgap semiconductor.

Assignees

• Nissan Motor

Inventors

• Tanaka Ryota
• Hayashi Tetsuya
• Ni Wei
• Hayami Yasuaki

Classifications

• H10W20/021

  of interconnections within wafers or substrates · CPC title

• H10D64/256

  for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673) · CPC title

• H10D64/513

  within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title

• H10D64/251 Primary

  Source or drain electrodes for field-effect devices · CPC title

• H10D84/0156

  Manufacturing their doped wells · CPC title