Display apparatus having level compensation layers and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-10937839-B2
Application number	US-201916251262-A
Country	US
Kind code	B2
Filing date	Jan 18, 2019
Priority date	Jan 18, 2018
Publication date	Mar 2, 2021
Grant date	Mar 2, 2021

Abstract

A display apparatus and a method of manufacturing a display apparatus, the display apparatus including a first area, the first area including a structure of thin layers on a substrate; a second area, the second area including a structure of thin layers on the substrate; a planarization layer that planarizes the first area and the second area; and a step-height compensation layer, wherein the structure of thin layers of the first area is different from the structure of thin layers of the second area, the step-height compensation layer compensates for a height difference between the first area and the second area due to the different structures of thin layers, and the step-height compensation layer is between the substrate and the planarization layer and in the first area or the second area.

First claim

What is claimed is:

1. A display apparatus, comprising:
a first area that includes a display area for realizing an image, the first area including a structure of thin layers on a substrate;
a second area that includes a non-display area in which wires for transmitting signals to the display area are arranged, the second area including a structure of thin layers on the substrate such that the structure of thin layers of the first area is different from the structure of thin layers of the second area;
a planarization layer that planarizes the first area and the second area; and
a step-height compensation layer, step-height compensation layer being between the substrate and the planarization layer and in the first area or the second area, wherein:
the step-height compensation layer compensates for a height difference between the first area and the second area due to the different structures of thin layers such that a height difference of the planarization layer between the display area and the non-display area is reduced.

2. The display apparatus as claimed in claim 1 , wherein the step-height compensation layer is provided in the non-display area.

3. The display apparatus as claimed in claim 2 , wherein:
the non-display area includes a plurality of insulating layers stacked on the substrate, the wires being arranged between the plurality of insulating layers, and
the step-height compensation layer is arranged between the substrate and the wires.

4. The display apparatus as claimed in claim 1 , wherein the step-height compensation layer includes a dummy pattern that is not connected to any electrical element in an area surrounding the step-height compensation layer.

5. The display apparatus as claimed in claim 4 , wherein the dummy pattern includes a conductive layer.

6. The display apparatus as claimed in claim 4 , wherein the dummy pattern includes an insulating layer.

7. The display apparatus as claimed in claim 1 , wherein the display area includes a thin film transistor and an organic light-emitting device connected to the thin film transistor.

8. The display apparatus as claimed in claim 7 , wherein the thin film transistor includes:
an active layer on the substrate,
a plurality of gate electrodes facing the active layer, and
a source electrode and a drain electrode connected to the active layer.

9. The display apparatus as claimed in claim 8 , wherein the organic light-emitting device includes:
a pixel electrode connected to the source and drain electrodes,
an opposite electrode facing the pixel electrode, and
an organic emission layer interposed between the pixel electrode and the opposite electrode and operating in response to a voltage between the pixel electrode and the opposite electrode.

10. The display apparatus as claimed in claim 1 , wherein the planarization layer has a polished upper surface in both the display area and the non-display area.

Assignees

• Samsung Display Co Ltd

Inventors

• Chung Yunmo
• Lee Takyoung
• SEO ILhun
• YOON Hojin
• Lee Daewoo

Classifications

• H10K59/124

  Insulating layers formed between TFT elements and OLED elements · CPC title

• H10K59/123

  Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H01L27/3223 Primary

  Electricity · mapped topic

• H01L27/3262

  Electricity · mapped topic