Method for detecting voids and an inspection system

Patent metadata

Field	Value
Publication number	US-10922809-B2
Application number	US-201816050412-A
Country	US
Kind code	B2
Filing date	Jul 31, 2018
Priority date	Aug 1, 2017
Publication date	Feb 16, 2021
Grant date	Feb 16, 2021

Abstract

A method for detecting voids in a metal line of a semiconductor device die includes: scanning an electron beam upon a selected location on the die containing the metal line; determine gray levels in an image produced by collected electrons of the electron beam backscattered from the selected location on the die; and identifying one or more voids in the metal line based on differences between the gray levels in the image.

First claim

What is claimed is:

1. A method for detecting buried voids in metal lines of a semiconductor device substrate during fabrication, the method comprising:
selecting locations within the semiconductor device substrate;
with an electron beam imaging system, collecting electrons scattered from the semiconductor device substrate in response to impinging a high energy primary particle beam onto areas of the semiconductor device substrate that include the selected locations within the semiconductor device substrate;
generating a backscattered electron image, from the collected electrons, of the areas of the semiconductor device substrate;
segmenting the backscattered electron image into portions corresponding to the metal lines of the semiconductor device substrate and portions corresponding to areas outside the metal lines of the semiconductor device substrate, wherein each of the portions corresponding to the metal lines corresponds to one of the metal lines; and
identifying a gray level signature for each portion and using the gray level signature to identify the buried voids within each corresponding portion, wherein fluctuations in gray levels within the gray level signature for each portion are correlated with the buried voids within each corresponding portion.

2. The method according to claim 1 , wherein segmenting the backscattered electron image comprises segmenting the backscattered electron image into first portions corresponding to the metal lines of the semiconductor device substrate and second portions corresponding to dielectric spaces of the semiconductor device substrate.

3. The method according to claim 1 , further comprising:
counting a number of the buried voids identified per corresponding portion to create a wafer map of the buried voids.

4. The method according to claim 1 , further comprising:
determining an energy of the high energy primary particle beam based on at least one of the following: void material, void depth, void size, feature information.

5. An electron beam imaging system adapted to carry out the method according to claim 1 .

6. A non-transitory computer readable medium comprising computer program code for running on a computer system, the computer program code including instructions for performing steps of the method according to claim 1 .

7. A method for detecting buried voids in a metal line of a semiconductor device die, the method comprising:
scanning a high energy electron beam upon a selected location on the semiconductor device die containing the metal line;
collecting electrons of the high energy electron beam backscattered from the metal line to generate a backscattered electron image;
identifying a gray level signature for a portion of the backscattered electron image corresponding to the metal line, the backscattered electron image produced by collected electrons of the high energy electron beam backscattered from the metal line; and
detecting the buried voids in the metal line based on the gray level signature for the portion of the backscattered electron image corresponding to the metal line, wherein fluctuations in gray levels within the gray level signature are correlated with the buried voids.

8. The method of claim 7 , further comprising estimating a depth of the buried voids based on an energy of the high energy electron beam impinging on the selected location on the semiconductor device die.

9. The method of claim 7 , further comprising:
performing a plurality of scans with the high energy electron beam upon the selected location on the semiconductor device die using a different electron beam energy for each scan;
generating a backscattered electron image for each scan; and
identifying a depth of the buried voids based on an energy of the high energy electron beam for each scan and differences between a gray level signature for each scan.

10. The method of claim 9 , wherein an electron beam having a first energy is used to detect a first buried void in the metal line close to a surface of the metal line and an electron beam having a second energy greater than the first energy is used to detect a second buried void in the metal line deeper than the first buried void.

11. An apparatus for detecting buried voids in a metal line of a semiconductor device die, the apparatus comprising:
an electron source configured to generate a high energy charged particle beam directed to a selected location on the semiconductor device die containing the metal line;
a backscattered electron (BSE) detector configured to detect electrons of the high energy charged particle beam backscattered from the semiconductor device die; and
a processor configured to:
receive one or more signals from the BSE detector;
process the one or more signals to generate a backscattered electron image of the metal line; and
determine whether buried voids exist in the metal line based on a gray level signature for the backscattered electron image of the metal line, wherein fluctuations in gray levels within the gray level signature are correlated with the buried voids.

12. The apparatus of claim 11 , wherein the processor is configured to control the electron source to perform a plurality of scans with the high energy charged particle beam upon the selected location on the semiconductor device die using a different charged particle beam energy for each scan.

13. The apparatus of claim 12 , wherein the processor is configured to determine a depth of detected buried voids in the metal line based at least in part on an energy of the high energy charged particle beam impinging on the selected location on the semiconductor device die.

14. The apparatus of claim 11 , wherein the processor is configured to control the electron source to generate a first electron beam having a first energy and a second electron beam having a second energy greater than the first energy,
scan the semiconductor device die using the first electron beam and scan the semiconductor device die using the second electron beam,
generate a backscattered electron image using the first electron beam and generate a backscattered electron image using the second electron beam, and
wherein the processor detects a first buried void in the metal line close to a surface of the metal line using the first electron beam and detects a second buried void in the metal line deeper than the first buried void using the second electron beam.

15. The apparatus of claim 11 , wherein the processor is configured to:
determine a number of buried voids detected at the selected location on the semiconductor device die,
determine a number of buried voids detected at other selected locations of other semiconductor device dies on a wafer, and
create a wafer map based on the number of buried voids detected at the selected location and the number of buried voids detected at the other selected locations.

Assignees

• Applied Materials Inc
• Applied Materials Israel Ltd

Inventors

• Shemesh Dror
• Kuchik Vadim
• Breil Nicolas L

Classifications

• G01Q90/00

  Scanning-probe techniques or apparatus not otherwise provided for · CPC title

• H01J2237/2817

  Pattern inspection · CPC title

• H01J2237/221

  Image processing · CPC title

• G06T2207/30148

  Semiconductor; IC; Wafer · CPC title

• H01J2237/2804

  Scattered primary beam · CPC title