Method of producing an SMD package with top side cooling

Patent metadata

Field	Value
Publication number	US-10903133-B2
Application number	US-202016737025-A
Country	US
Kind code	B2
Filing date	Jan 8, 2020
Priority date	Sep 8, 2017
Publication date	Jan 26, 2021
Grant date	Jan 26, 2021

Abstract

A package encloses a power semiconductor die and has a package body with a top side, footprint side and sidewalls. The die has first and second load terminals and blocks a blocking voltage between the load terminals. The package further includes: a lead frame structure for electrically and mechanically coupling the package to a support, the lead frame structure including an outside terminal extending out of the package footprint side and/or out of one of the package sidewalls and electrically connected with the first load terminal; and a top layer arranged at the package top side and electrically connected with the second load terminal. A heat spreader is mounted onto the top layer with a bottom surface facing the top layer. The area of the top surface of the heat spreader is greater than the area of the bottom surface.

First claim

What is claimed is:

1. A method, comprising:
providing a package that encloses a power semiconductor die, the package comprising a package body with a package top side, a package footprint side and package sidewalls, the package sidewalls extending from the package footprint side to the package top side, wherein the power semiconductor die has a first load terminal and a second load terminal and is configured to block a blocking voltage applied between said load terminals, the package further comprising: a lead frame structure configured to electrically and mechanically couple the package to a support with the package footprint side facing the support, the lead frame structure comprising at least one first outside terminal extending out of the package footprint side and/or out of one of the package sidewalls and electrically connected with the first load terminal of the power semiconductor die; and a top layer arranged at the package top side and being electrically connected with the second load terminal of the power semiconductor die;
providing a heat spreader separately from the package body, the heat spreader having a bottom surface and a top surface, an area of the top surface being greater than an area of the bottom surface; and
mounting the heat spreader onto the top layer with the heat spreader bottom surface facing the top layer,
wherein a contour of the heat spreader bottom surface matches a contour of the top layer.

2. The method of claim 1 , further comprising:
before mounting the heat spreader to the top layer, soldering the at least one outside terminal to the support.

3. The method of claim 2 , wherein soldering the at least one outside terminal to the support comprises at least one first reflow soldering processing step, and wherein mounting the heat spreader onto the top layer comprises at least one second reflow soldering processing step.

4. The method of claim 1 , wherein the package body is made of a molding mass, and wherein the molding mass spatially confines the top layer at the package top side.

5. The method of claim 1 , wherein the area of the heat spreader top surface is at least 120% of the area of the heat spreader bottom surface.

6. The method of claim 1 , wherein a bottom surface of the top layer has a surface area at least 50% and less than 100% of a total surface area of the package top side.

7. The method of claim 1 , wherein the area of the heat spreader bottom surface is within a range of 80% to 100% of a surface area of a top surface of the top layer.

8. The method of claim 1 , wherein the area of the heat spreader top surface is within a range of 80% to 120% of a footprint area of the package.

9. The method of claim 1 , wherein the heat spreader comprises sidewalls extending from the bottom surface to the top surface, and wherein at least one of the sidewalls has a profile with one or more non-vertical sections.

10. The method of claim 1 , wherein each of the package footprint side, the package top side, the top layer, the heat spreader bottom surface and the heat spreader top surface is arranged substantially horizontal.

11. The method of claim 1 , wherein the top layer is arranged substantially coplanar with the package top side.

12. The method of claim 1 , wherein mounting the heat spreader onto the top layer comprises soldering the heat spreader to the top layer.

13. The method of claim 1 , wherein mounting the heat spreader onto the top layer comprises positively locking the heat spreader to the top layer.

14. The method of claim 1 , further comprising arranging an electrically conductive interconnect layer between and in contact with each of the heat spreader and the top layer.

15. The method of claim 1 , further comprising coupling the heat spreader top surface to an isolation layer having an area at least 120% of the area of the top layer.

16. The method of claim 1 , wherein the package is a top side cooling package with the top layer being configured for top side cooling.

17. The method of claim 1 , wherein each of the package top side and the package footprint side extend substantially horizontally, wherein the package sidewalls extend substantially vertically, and wherein a maximum horizontal extension of the package footprint side is at least twice of a maximum vertical extension of the package sidewalls.

18. The method of claim 1 , wherein the package is a surface-mount device (SMD) package.

19. A method, comprising:
providing a package that encloses a power semiconductor die, the package comprising a package body with a package top side, a package footprint side and package sidewalls, the package sidewalls extending from the package footprint side to the package top side, wherein the power semiconductor die has a first load terminal and a second load terminal and is configured to block a blocking voltage applied between said load terminals, the package further comprising: a lead frame structure configured to electrically and mechanically couple the package to a support with the package footprint side facing the support, the lead frame structure comprising at least one first outside terminal extending out of the package footprint side and/or out of one of the package sidewalls and electrically connected with the first load terminal of the power semiconductor die; and a top layer arranged at the package top side and being electrically connected with the second load terminal of the power semiconductor die;
providing a heat spreader separately from the package body, the heat spreader having a bottom surface and a top surface, an area of the top surface being greater than an area of the bottom surface;
mounting the heat spreader onto the top layer with the heat spreader bottom surface facing the top layer; and
coupling the heat spreader top surface to an isolation layer having an area at least 120% of the area of the top layer.

Assignees

• Infineon Technologies Austria Ag

Inventors

• Otremba Ralf
• Dinkel Markus
• Froehler Ulrich
• Hoeglauer Josef
• Kirchner Uwe
• Lohmann Guenther
• Schiess Klaus
• Schloegel Xaver

Classifications

• H10W74/111

  the semiconductor body being completely enclosed · CPC title

• H10W70/429

  being the outer leads · CPC title

• H10W74/01

  Manufacture or treatment · CPC title

• H10W70/421

  Shapes or dispositions · CPC title

• H10W40/778

  in encapsulations · CPC title