Semiconductor-mounting heat dissipation base plate and production method therefor

US10898946B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10898946-B2
Application numberUS-201716080163-A
CountryUS
Kind codeB2
Filing dateMay 29, 2017
Priority dateJun 16, 2016
Publication dateJan 26, 2021
Grant dateJan 26, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In a semiconductor-mounting heat dissipation base plate including: an insulating substrate to which a metal circuit layer for mounting a semiconductor chip thereon is fixed; a heat dissipation base formed from the same metal material as the metal circuit layer at a side opposite to the metal circuit layer across the insulating substrate and fixed to the insulating substrate similar to the metal circuit layer; and a strengthening member provided in the heat dissipation base so as to be separated from the insulating substrate, the sizes of crystal grains of a metal structure at a part of the heat dissipation base or the metal circuit layer are reduced by a crystal size reducing material adhered to a mold, thereby preventing an adverse effect of a columnar crystal structure.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor-mounting heat dissipation base plate comprising: an insulating substrate which is formed from a ceramic and to which a metal circuit layer for mounting a semiconductor component thereon and formed from aluminum is fixed; and a heat dissipation base fixed to the insulating substrate at a side opposite to the metal circuit layer across the insulating substrate and formed from aluminum, wherein a crystal grain diameter regulated region in which crystal grain diameter is regulated is provided in at least a heat dissipation surface of the heat dissipation base, the average crystal grain diameter in the crystal grain diameter regulated region is smaller than an average crystal grain diameter in other regions of the heat dissipation base, and than an average crystal grain diameter in the metal circuit layer, and an outer surface of the crystal grain diameter regulated region is coplanar with an outer surface of the other regions of the heat dissipation base. 2. The semiconductor-mounting heat dissipation base plate according to claim 1 , further comprising a fastening portion provided in the heat dissipation base, wherein the crystal grain diameter regulated region is provided in a surface of the heat dissipation base including at least a surface of the fastening portion. 3. The semiconductor-mounting heat dissipation base plate according to claim 2 , wherein a second crystal grain diameter regulated region is provided in the surface of the metal circuit layer. 4. The semiconductor-mounting heat dissipation base plate according to claim 3 , wherein the metal circuit layer and the heat dissipation base are formed from aluminum having a purity of 99 to 99.9%, and the average crystal grain diameter in the crystal grain diameter regulated region is less than or equal to 12 mm. 5. The semiconductor-mounting heat dissipation base plate according to claim 2 , wherein the metal circuit layer and the heat dissipation base are formed from aluminum having a purity of 99 to 99.9%, and the average crystal grain diameter in the crystal grain diameter regulated region is less than or equal to 12 mm. 6. The semiconductor-mounting heat dissipation base plate according to claim 1 , wherein the crystal grain diameter regulated region is provided in the surface of the metal circuit layer. 7. The semiconductor-mounting heat dissipation base plate according to claim 6 , wherein the metal circuit layer and the heat dissipation base are formed from aluminum having a purity of 99 to 99.9%, and the average crystal grain diameter in the crystal grain diameter regulated region is less than or equal to 12 mm. 8. The semiconductor-mounting heat dissipation base plate according to claim 1 , wherein the metal circuit layer and the heat dissipation base are formed from aluminum having a purity of 99 to 99.9%, and the average crystal grain diameter in the crystal grain diameter regulated region is less than or equal to 12 mm. 9. The semiconductor-mounting heat dissipation base plate according to claim 1 , wherein the heat dissipation base contacts the insulating substrate. 10. The semiconductor-mounting heat dissipation base plate according to claim 9 , wherein the heat dissipation base is fixed to the insulating substrate by direct bonding. 11. A method for producing a semiconductor-mounting heat dissipation base plate including: an insulating substrate which is formed from a ceramic and to which a metal circuit layer for mounting a semiconductor component thereon and formed from aluminum is fixed by direct bonding through casting; and a heat dissipation base formed from aluminum and fixed to the insulating substrate at a side opposite to the metal circuit layer across the insulating substrate by direct bonding through casting, the method comprising adhering at least one or more types of a crystal grain size reducing material to a part of a cavity-side surface of a mold during casting of the heat dissipation base and the metal circuit layer, thereby forming a crystal grain diameter regulated region in which crystal grain diameter is regulated, in at least a part of a surface of the heat dissipation base or the metal circuit layer, wherein at least one or more types of a crystal grain size reducing material are adhered to a portion of the cavity-side surface of the mold in casting, the portion including at least a surface of a fastening portion provided in the heat dissipation base and opposing a part of the heat dissipation base. 12. The method for producing the semiconductor-mounting heat dissipation base plate according to claim 11 , the portion including a part opposing the metal circuit layer. 13. The method for producing the semiconductor-mounting heat dissipation base plate according to claim 11 , the portion including a part opposing a heat dissipation surface of the heat dissipation base. 14. A semiconductor-mounting heat dissipation base plate comprising: an insulating substrate which is formed from a ceramic and to which a metal circuit layer for mounting a semiconductor component thereon and formed from aluminum is fixed; and a heat dissipation base fixed to the insulating substrate at a side opposite to the metal circuit layer across the insulating substrate and formed from aluminum, wherein a crystal grain diameter regulated region in which crystal grain diameter is regulated is provided in at least a part of a surface of the metal circuit layer, the average crystal grain diameter in the crystal grain diameter regulated region is smaller than an average crystal grain diameter in other regions of the metal circuit layer, and the heat dissipation base contacts the insulating substrate.

Assignees

Inventors

Classifications

  • being on a metallic substrate, e.g. insulated metal substrates [IMS] · CPC title

  • Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

  • Metallic materials (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence) · CPC title

  • Arrangements for heating · CPC title

  • Measures for using chemical processes for influencing the surface composition of castings, e.g. for increasing resistance to acid attack · CPC title

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What does patent US10898946B2 cover?
In a semiconductor-mounting heat dissipation base plate including: an insulating substrate to which a metal circuit layer for mounting a semiconductor chip thereon is fixed; a heat dissipation base formed from the same metal material as the metal circuit layer at a side opposite to the metal circuit layer across the insulating substrate and fixed to the insulating substrate similar to the metal…
Who is the assignee on this patent?
Mitsubishi Electric Corp
What technology area does this patent fall under?
Primary CPC classification B22C3/00. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Jan 26 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).