Method for copper plating through silicon vias using wet wafer back contact

US10879116B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10879116-B2
Application numberUS-201414896854-A
CountryUS
Kind codeB2
Filing dateMay 27, 2014
Priority dateJun 17, 2013
Publication dateDec 29, 2020
Grant dateDec 29, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method and apparatus for processing a substrate are provided. In some implementations, the method comprises providing a silicon substrate having an aperture containing an exposed silicon contact surface at a bottom of the aperture, depositing a metal seed layer on the exposed silicon contact surface and exposing the substrate to an electroplating process by flowing a current through a backside of the substrate to form a metal layer on the metal seed layer.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for depositing a material on a substrate, comprising: depositing a metal seed layer on an exposed silicon contact surface at a bottom of an aperture on a silicon substrate; exposing a backside of the substrate to a potassium hydroxide solution while exposing the metal seed layer to a copper containing solution, wherein the substrate separates the potassium hydroxide solution from the copper containing solution; and flowing a current through the substrate to form a metal layer on the metal seed layer. 2. The method of claim 1 , wherein flowing a current through the substrate to form a metal layer comprises filling the aperture with the metal layer. 3. The method of claim 1 , wherein the metal of the metal seed layer is selected from cobalt and nickel. 4. The method of claim 3 , wherein the metal of the metal seed layer is nickel deposited by an electroless process. 5. The method of claim 3 , wherein the metal of the metal seed layer is cobalt deposited by either an electroless or a chemical vapor deposition process. 6. The method of claim 1 , wherein the metal of the metal layer is copper. 7. A method for depositing a material on a substrate, comprising: depositing a metal seed layer on an exposed silicon contact surface at the bottom of an aperture on a silicon substrate; exposing a backside of the substrate to a hydrofluoric acid solution while exposing the metal seed layer to a copper containing solution, wherein the substrate separates the hydrofluoric acid solution from the copper containing solution; and flowing a current through the substrate to form a metal layer on the metal seed layer. 8. A method for depositing a material on a substrate, comprising: depositing a conformal barrier layer over a field region of a silicon substrate, at least one sidewall of a feature extending from the field region toward a backside of the silicon substrate and a bottom surface of the feature; removing a portion of the conformal barrier layer from the bottom surface of the feature to expose the silicon substrate; depositing a metal seed layer on the exposed silicon substrate at the bottom of the feature; exposing the backside of the substrate to a contact solution while exposing the metal seed layer to a copper containing solution, wherein the substrate separates the contact solution from the copper containing solution; and flowing a current through the silicon substrate to form a metal layer on the metal seed layer. 9. The method of claim 8 , further comprising forming an oxide containing layer over the field region of the silicon substrate prior to depositing a conformal barrier layer over the field region, the at least one sidewall, and the bottom surface of the feature. 10. The method of claim 8 , wherein the contact solution comprises a hydrofluoric acid solution. 11. The method of claim 10 , wherein the contact solution further comprises potassium fluoride. 12. The method of claim 8 , wherein the barrier layer comprises a tantalum nitride barrier layer. 13. The method of claim 12 , wherein the barrier layer further comprises a silicon dioxide layer and the silicon dioxide layer is positioned under the tantalum nitride barrier layer. 14. The method of claim 8 , wherein the contact solution comprises a potassium hydroxide solution.

Assignees

Inventors

Classifications

  • H10P14/47Primary

    Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

  • the barrier, adhesion or liner layers being within a main fill metal · CPC title

  • the interconnections being through-semiconductor vias · CPC title

  • comprising use of blind vias during the manufacture · CPC title

  • characterised by the filling method or the material of the conductive fill · CPC title

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What does patent US10879116B2 cover?
A method and apparatus for processing a substrate are provided. In some implementations, the method comprises providing a silicon substrate having an aperture containing an exposed silicon contact surface at a bottom of the aperture, depositing a metal seed layer on the exposed silicon contact surface and exposing the substrate to an electroplating process by flowing a current through a backsid…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10P14/47. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 29 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).