Display device

Patent metadata

Field	Value
Publication number	US-10872565-B2
Application number	US-201815869600-A
Country	US
Kind code	B2
Filing date	Jan 12, 2018
Priority date	Jan 16, 2017
Publication date	Dec 22, 2020
Grant date	Dec 22, 2020

Abstract

The display evenness of a large or high-resolution display device is improved. The display device includes a source driver, a first gate driver, a second gate driver, a first pixel, and a second pixel. The first pixel is electrically connected to the source driver and the first gate driver. The second pixel is electrically connected to the source driver and the second gate driver. The first pixel is located closer to the source driver than the second pixel is. The first gate driver has a function of supplying a first write signal to the first pixel. The second gate driver has a function of supplying a second write signal to the second pixel. The pulse width of the second write signal is larger than the pulse width of the first write signal.

First claim

What is claimed is:

1. A display device comprising:
a source driver;
a first gate driver;
a second gate driver;
a first pixel;
a second pixel; and
a third pixel,
wherein the source driver is electrically connected to a source line,
wherein the first pixel is electrically connected to the source line and the first gate driver,
wherein the second pixel is electrically connected to the source line and the second gate driver,
wherein the third pixel is electrically connected to the source line and the first gate driver,
wherein the first pixel is directly adjacent to the third pixel,
wherein the first gate driver is configured to supply a first write signal to the first pixel,
wherein the second gate driver is configured to supply a second write signal to the second pixel after the first gate driver supplies the first write signal,
wherein the first gate driver is configured to supply a third write signal to the third pixel after the second gate driver supplies the second write signal,
wherein a pulse width of the second write signal is larger than a pulse width of the first write signal, and
wherein a second period while the second write signal is supplied does not overlap with a first period while the first write signal is supplied or a third period while the third write signal is supplied.

2. The display device according to claim 1 , further comprising:
a fourth pixel,
wherein the fourth pixel is electrically connected to the source line and the second gate driver,
wherein the second pixel is directly adjacent to the fourth pixel,
wherein the second gate driver is configured to supply a fourth write signal to the fourth pixel after the first gate driver supplies the third write signal, and
wherein a pulse width of the fourth write signal is larger than the pulse width of the first write signal and a pulse width of the third write signal.

3. The display device according to claim 1 , wherein the source driver is closer to the first pixel than the second pixel.

4. The display device according to claim 2 ,
wherein the source driver is closer to the third pixel than the second pixel, and
wherein the source driver is farther away from the fourth pixel than the first pixel and the third pixel.

5. The display device according to claim 1 , further comprising a display controller,
wherein the display controller is configured to supply a control signal for the source driver, a control signal for the first gate driver, and a control signal for the second gate driver,
wherein the source driver is configured to receive the control signal for the source driver,
wherein the first gate driver is configured to receive the control signal for the first gate driver,
wherein the second gate driver is configured to receive the control signal for the second gate driver, and
wherein one of the control signal for the first gate driver and the control signal for the second gate driver is a rectangular wave with a duty cycle of not 50%.

6. A display device comprising:
a source driver;
a first gate driver;
a second gate driver;
a first pixel group; and
a second pixel group,
wherein the source driver is electrically connected to a source line,
wherein pixels in the first pixel group are adjacent each other,
wherein pixels in the second pixel group are adjacent each other,
wherein the first pixel group is electrically connected to the source line and the first gate driver,
wherein the second pixel group is electrically connected to the source line and the second gate driver,
wherein the first gate driver is configured to supply a first write signal to each of the pixels in the first pixel group,
wherein the second gate driver is configured to supply a second write signal to each of the pixels in the second pixel group,
wherein a pulse width of the second write signal is larger than a pulse width of the first write signal,
wherein supply of the first write signal by the first gate driver and supply of the second write signal by the second gate driver are performed alternately, and
wherein a second period while the second write signal is supplied does not overlap with a first period while the first write signal is supplied.

7. The display device according to claim 6 , wherein the source driver is closer to the first pixel group than the second pixel group.

8. The display device according to claim 6 , further comprising a display controller,
wherein the display controller is configured to supply a control signal for the source driver, a control signal for the first gate driver, and a control signal for the second gate driver,
wherein the source driver is configured to receive the control signal for the source driver,
wherein the first gate driver is configured to receive the control signal for the first gate driver,
wherein the second gate driver is configured to receive the control signal for the second gate driver, and
wherein one of the control signal for the first gate driver and the control signal for the second gate driver is a rectangular wave with a duty cycle of not 50%.

Assignees

• Semiconductor Energy Lab

Inventors

• Kobayashi Hidetomo

Classifications

• G09G3/3648 Primary

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

• H10K59/805

  Electrodes · CPC title

• G09G3/3258 Primary

  with pixel circuitry controlling the voltage across the light-emitting element · CPC title

• G09G3/3674

  Details of drivers for scan electrodes · CPC title

• G09G2330/028

  Generation of voltages supplied to electrode drivers in a matrix display other than LCD · CPC title