Power semiconductor module

Patent metadata

Field	Value
Publication number	US-10854524-B2
Application number	US-201916531296-A
Country	US
Kind code	B2
Filing date	Aug 5, 2019
Priority date	Feb 3, 2017
Publication date	Dec 1, 2020
Grant date	Dec 1, 2020

Abstract

The present application provides a power semiconductor module, including a support which carries at least one power semiconductor device, the support together with the power semiconductor device is at least partly located in a housing, the support and the power semiconductor device are at least partly covered by a sealing material, additionally to the sealing material, a protecting material is provided in the housing, the protecting material is formed from silicon gel and the protecting material at least partly covers at least one of the support, the power semiconductor device and the sealing material.

First claim

The invention claimed is:

1. A power semiconductor module, comprising
a support which carries at least one power semiconductor device, wherein
the support together with the power semiconductor device is at least partly located in a housing, wherein
the support and the power semiconductor device are at least partly covered by a sealing material, wherein
additionally to the sealing material, a protecting material is provided in the housing, wherein
the protecting material is formed from silicon gel and wherein
the protecting material at least partly covers at least one of the support, the power semiconductor device and the sealing material, wherein
the sealing material comprises a contact area to the protecting material, wherein said contact area comprises protrusions and/or recesses proceeding into the protecting material.

2. The power semiconductor module according to claim 1 , wherein at least a termination of at least one power semiconductor device is covered by the sealing material.

3. The power semiconductor module according to claim 2 wherein the free areas of at least one power semiconductor device are fully covered by the sealing material.

4. The power semiconductor module according to claim 1 , wherein at least one power semiconductor device is electrically contacted by wire bonds, wherein the wire bonds are fully covered by the sealing material.

5. The power semiconductor module according to claim 1 , wherein the support comprises a connection area being free of sealing material, wherein the connecting area is designed for receiving a terminal plate.

6. The power semiconductor module according to claim 5 , which further includes a terminal plate located on the connection area, wherein the terminal plate is spaced from the sealing material.

7. The power semiconductor module according to claim 1 , wherein the power semiconductor device is electrically connected by a press-fit connector.

8. The power semiconductor module according to claim 1 , wherein the support comprises a substrate.

9. The power semiconductor module according to claim 8 , wherein the free areas of the substrate are fully covered by the sealing material.

10. The power semiconductor module according to claim 1 , wherein the sealing material is not in direct contact to the housing.

11. The power semiconductor module according to claim 1 , wherein the housing is formed T-shaped such, that a protrusion proceeds into the inner volume of the housing and is in contact to the protecting material.

12. The power semiconductor module according to claim 1 , wherein the sealing material is formed from an epoxy mould compound or an epoxy resin.

13. The power semiconductor module according to claim 1 , wherein the sealing material comprises a filler.

14. The power semiconductor module according to claim 2 , wherein at least one power semiconductor device is electrically contacted by wire bonds, wherein the wire bonds are fully covered by the sealing material.

15. The power semiconductor module according to claim 3 , wherein at least one power semiconductor device is electrically contacted by wire bonds, wherein the wire bonds are fully covered by the sealing material.

16. The power semiconductor module according to claim 2 , wherein the support comprises a connection area being free of sealing material, wherein the connecting area is designed for receiving a terminal plate.

17. The power semiconductor module according to claim 3 , wherein the support comprises a connection area being free of sealing material, wherein the connecting area is designed for receiving a terminal plate.

18. The power semiconductor module according to claim 4 , wherein the support comprises a connection area being free of sealing material, wherein the connecting area is designed for receiving a terminal plate.

19. The power semiconductor module according to claim 17 , which further includes a terminal plate located on the connection area, wherein the terminal plate is spaced from the sealing material.

20. The power semiconductor module according to claim 18 , which further includes a terminal plate located on the connection area, wherein the terminal plate is spaced from the sealing material.

Assignees

• Abb Schweiz Ag

Inventors

• Guillon David
• Papadopoulos Charalampos
• Truessel Dominik
• Fischer Fabian
• Hartmann Samuel

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W76/47

  Solid or gel fillings · CPC title