Smart device fabrication via precision patterning

Patent metadata

Field	Value
Publication number	US-10818481-B2
Application number	US-201615215382-A
Country	US
Kind code	B2
Filing date	Jul 20, 2016
Priority date	Nov 11, 2013
Publication date	Oct 27, 2020
Grant date	Oct 27, 2020

Abstract

Embodiments involve smart device fabrication for semiconductor processing tools via precision patterning. In one embodiment, a method of manufacturing a semiconductor processing tool component includes providing a substrate of the semiconductor processing tool component, patterning the substrate to form a sensor directly on the substrate, and depositing a top layer over the sensor. The sensor may include, for example, a temperature or strain sensor. The method can also include patterning the substrate to form one or more of: heaters, thermistors, and electrodes on the substrate. In one embodiment, the method involves patterning a surface of the component oriented towards a plasma region inside of the semiconductor processing tool.

First claim

What is claimed is:

1. A semiconductor processing tool component comprising:
a showerhead;
a sensor disposed directly on a surface of the showerhead, wherein the sensor is a strain sensor, and wherein the surface of the showerhead is a plasma-facing surface of the showerhead;
a top layer disposed directly on the sensor; and
a controller coupled to the sensor, wherein the controller monitors a strain from the sensor to predict a rate of erosion of the top layer, and to predict a remaining lifetime of the showerhead based on the predicted rate of erosion of the top layer within a plasma region of a plasma chamber.

2. The semiconductor processing tool component of claim 1 , wherein the top layer is a plasma-resistant layer.

3. The semiconductor processing tool component of claim 1 , wherein the top layer is a dielectric layer.

4. A semiconductor processing system comprising:
a semiconductor processing chamber comprising a component, the component comprising:
a showerhead;
a sensor disposed directly on a surface of the showerhead oriented towards a plasma region inside of a semiconductor processing tool, wherein the sensor is a strain sensor, and wherein the surface of the showerhead is a plasma-facing surface of the showerhead; and
a top layer disposed directly on the sensor, wherein the strain sensor is to predict a rate of erosion of the top layer directly on the sensor;
a controller coupled to the sensor, wherein the controller monitors a strain from the sensor to predict a rate of erosion of the top layer, and to predict a remaining lifetime of the showerhead based on the predicted rate of erosion of the top layer within the plasma region of the semiconductor process tool; and
a heating element disposed directly on the surface of the showerhead oriented towards the plasma region inside of the semiconductor processing tool, wherein the controller controls a temperature of the component with the heating element based on measurements from the sensor.

5. The semiconductor processing system of claim 4 , wherein the top layer is a plasma-resistant layer.

6. The semiconductor processing system of claim 4 , wherein the top layer is a dielectric layer.

7. A semiconductor processing tool component comprising:
a processing chamber lid;
a sensor disposed directly on a surface of the processing chamber lid, wherein the sensor is a strain sensor, and wherein the surface of the processing chamber lid is a plasma-facing surface of the processing chamber lid; and
a top layer disposed directly on the sensor; and
a controller coupled to the sensor, wherein the controller monitors a strain from the sensor to predict a rate of erosion of the top layer, and to predict a remaining lifetime of the processing chamber lid based on the predicted rate of erosion of the top layer within a plasma region of a plasma chamber.

8. The semiconductor processing tool component of claim 7 , wherein the top layer is a plasma-resistant layer.

9. The semiconductor processing tool component of claim 7 , wherein the top layer is a dielectric layer.

10. A semiconductor processing system comprising:
a semiconductor processing chamber comprising a component, the component comprising:
a processing chamber lid;
a sensor disposed directly on a surface of the processing chamber lid oriented towards a plasma region inside of a semiconductor processing tool, wherein the sensor is a strain sensor, and wherein the surface of the processing chamber lid is a plasma-facing surface of the processing chamber lid; and
a top layer disposed directly on the sensor;
a controller coupled to the sensor, wherein the controller monitors a strain from the sensor to predict a rate of erosion of the top layer, and to predict a remaining lifetime of the processing chamber lid based on the predicted rate of erosion of the top layer within a plasma region of the semiconductor processing tool; and
a heating element disposed directly on the surface of the processing chamber lid oriented towards the plasma region inside of the semiconductor processing tool, wherein the controller controls a temperature of the component with the heating element based on measurements from the sensor.

11. The semiconductor processing system of claim 10 , wherein the top layer is a plasma-resistant layer.

12. The semiconductor processing system of claim 10 , wherein the top layer is a dielectric layer.

Assignees

• Applied Materials Inc

Inventors

• Sun Jennifer
• Chen Yikai
• Kanungo Biraja
• Firouzdor Vahid

Classifications

• H10P72/0421

  for drying etching · CPC title

• H05B1/0233 Primary

  for semiconductors manufacturing · CPC title

• H01J2237/334

  Etching · CPC title

• H05B2203/013

  Heaters using resistive films or coatings · CPC title

• H01J37/32935 Primary

  Monitoring and controlling tubes by information coming from the object and/or discharge · CPC title