Electronic component embedded substrate

Patent metadata

Field	Value
Publication number	US-10813220-B2
Application number	US-201815892722-A
Country	US
Kind code	B2
Filing date	Feb 9, 2018
Priority date	Feb 13, 2017
Publication date	Oct 20, 2020
Grant date	Oct 20, 2020

Abstract

An electronic component embedded substrate includes: a substrate that includes an insulating layer and has a first principal surface and a second principal surface; an electronic component that is embedded in the substrate and has at least one first terminal, at least one second terminal, and a capacity part; at least one via conductor that are formed in the insulating layer and electrically connected to the second terminal; and an adhesion layer that is in contact with the second terminal on an end face of the second terminal which are close to the second principal surface. The electronic component is laminated with the insulating layer, and adhesion strength between the adhesion layer and the insulating layer is higher than that between the second terminal and the insulating layer.

First claim

What is claimed is:

1. An electronic component embedded substrate comprising:
a substrate having:
an insulating layer;
a first principal surface; and
a second principal surface on an opposite side of the first principal surface;

an electronic component embedded in the substrate and laminated with the insulating layer, the electronic component having:
a plurality of first terminals that are divided from each other and disposed closer to the first principal surface than to the second principal surface;
a plurality of second terminals that are divided from each other and disposed closer to the second principal surface than to the first principal surface, the plurality of second terminals being made of a first material and each including an end face facing the second principal surface; and
a capacity part provided between the plurality of first terminals and the plurality of second terminals;

via conductors formed in the insulating layer and respectively electrically connected to each of the plurality of second terminals, the via conductors being formed of a second material different from the first material; and
adhesion layers respectively in contact with the end faces of each of the plurality of second terminals,
wherein adhesion strength between the adhesion layers and the insulating layer is higher than that between the plurality of second terminals and the insulating layer,
a number of the first terminals is larger than a number of the second terminals, and
the second terminals are thicker than the first terminals in a laminating direction;
the adhesion layers and the via conductors are in contact with each other; and
adhesion strength between the adhesion layers and the via conductors is higher than that between the second terminals and the via conductors.

2. The electronic component embedded substrate according to claim 1 , wherein the adhesion layers each have a plurality of layers.

3. The electronic component embedded substrate according to claim 1 , wherein:
the substrate further includes a core embedded in the insulating layer;
a through-hole passing from a first principal surface side to a second principal surface side is provided in the core; and
the electronic component is disposed in the through-hole.

4. The electronic component embedded substrate according to claim 2 , wherein:
the substrate further includes a core embedded in the insulating layer;
a through-hole passing from a first principal surface side to a second principal surface side is provided in the core; and
the electronic component is disposed in the through-hole.

Assignees

• Tdk Corp

Inventors

• Tomikawa Mitsuhiro
• Tsunoda Koichi
• Yoshikawa Kazuhiro
• Yoshida Kenichi

Classifications

• H05K1/185 Primary

  associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards · CPC title

• H05K3/4697

  having cavities, e.g. for mounting components (H05K3/4691 takes precedence) · CPC title

• H05K3/4644

  by building the multilayer layer by layer, i.e. build-up multilayer circuits (making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602) · CPC title

• H05K2203/1461

  Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors · CPC title

• H05K3/30

  Assembling printed circuits with electric components, e.g. with resistors · CPC title