Frequency tunable filter with voltage stressed relaxed switch, and associated apparatus
US-2017126205-A1 · May 4, 2017 · US
US10770657B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10770657-B2 |
| Application number | US-201916692802-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 22, 2019 |
| Priority date | Aug 14, 2018 |
| Publication date | Sep 8, 2020 |
| Grant date | Sep 8, 2020 |
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A semiconductor structure includes a semiconductor mesa situated on a semiconductor substrate, a trap-rich region comprising polycrystalline silicon adjacent to the semiconductor mesa, and a phase-change material (PCM) radio frequency (RF) switch. A heating element of the PCM RF switch is situated over the semiconductor mesa. An interconnect segment coupled to the PCM RF switch is situated over the trap-rich region. Alternatively, a semiconductor structure can include a trap-rich region adjacent to a single crystal region of the semiconductor substrate, where the trap-rich region is formed by implant damaging, and where the heating element of the PCM RF switch is situated over the single crystal region.
Opening claim text (preview).
The invention claimed is: 1. A semiconductor structure comprising: a semiconductor mesa on a semiconductor substrate: a trap-rich region adjacent to said semiconductor mesa; a phase-change material (PCM) radio frequency (RF) switch, wherein a heating element of said PCM RF switch is situated over said semiconductor mesa; wherein at least a portion of an interconnect segment coupled to said PCM RF switch is situated over said trap-rich region. 2. The semiconductor structure of claim 1 , wherein said semiconductor mesa comprises single crystal silicon. 3. The semiconductor structure of claim 1 , wherein said semiconductor substrate comprises high resistivity silicon substrate. 4. The semiconductor structure of claim 1 , wherein said trap-rich region comprises polycrystalline silicon. 5. The semiconductor structure of claim 1 , wherein said semiconductor mesa is a heat spreader for dissipating heat generated by said heating element. 6. The semiconductor structure of claim 1 , wherein said PCM RF switch includes a thermally conductive and electrically insulating segment situated over said heating element. 7. The semiconductor structure of claim 1 , wherein said PCM RF switch includes a PCM selected from the group consisting of germanium telluride (Ge X Te Y ), germanium antimony telluride (Ge X Sb Y Te Z ), germanium selenide (Ge X Se Y ), and any other chalcogenide. 8. A method comprising: etching a semiconductor substrate to form a semiconductor mesa on said semiconductor substrate; forming a trap-rich layer over said semiconductor mesa and said semiconductor substrate; removing said trap-rich layer from a top surface of said semiconductor mesa to form a trap-rich region adjacent to said semiconductor mesa; forming a phase-change material (PCM) radio frequency (RF) switch, wherein a heating element of said PCM RF switch is situated over said semiconductor mesa; forming an interconnect segment coupled to said PCM RF switch, wherein at least a portion of said interconnect segment is situated over said trap-rich region. 9. The method of claim 8 , further comprising, prior to said forming said trap-rich layer: forming an oxide layer over said semiconductor mesa and said semiconductor substrate; removing said oxide layer. 10. The method of claim 8 , wherein said PCM RF switch includes a thermally conductive and electrically insulating segment situated over said heating element. 11. A semiconductor structure comprising: a trap-rich region adjacent to a single crystal region of a semiconductor substrate; a phase-change material (PCM) radio frequency (RF) switch, wherein a heating element of said PCM RF switch is situated over said single crystal region; wherein at least a portion of an interconnect segment coupled to said PCM RF switch is situated over said trap-rich region. 12. The semiconductor structure of claim 11 , wherein said single crystal region comprises single crystal silicon. 13. The semiconductor structure of claim 11 , wherein said semiconductor substrate comprises high resistivity silicon substrate. 14. The semiconductor structure of claim 11 , wherein said trap-rich region comprises implant-damaged silicon. 15. The semiconductor structure of claim 11 , wherein said single crystal region is a heat spreader for dissipating heat generated by said heating element. 16. The semiconductor structure of claim 11 , wherein said PCM RF switch includes a thermally conductive and electrically insulating segment situated over said heating element. 17. The semiconductor structure of claim 11 , wherein said PCM RF switch includes a PCM selected from the group consisting of germanium telluride (Ge X Te Y ), germanium antimony telluride (Ge X Sb Y Te Z ), germanium selenide (Ge X Se Y ), and any other chalcogenide. 18. A method comprising: forming a mask over a semiconductor substrate; implant damaging an exposed surface of said semiconductor substrate to form a trap-rich region adjacent to a single crystal region of said semiconductor substrate; removing said mask; forming a phase-change material (PCM) radio frequency (RF) switch, wherein a heating element of said PCM RF switch is situated over said single crystal region; forming an interconnect segment coupled to said PCM RF switch, wherein at least a portion of said interconnect segment is situated over said trap-rich region. 19. The method of claim 18 , wherein said implant damaging uses an implant selected from the group consisting of argon (Ar), silicon (Si), germanium (Ge), krypton (Kr), xenon (Xe), carbon (C), oxygen (O), and nitrogen (N). 20. The method of claim 18 , wherein said PCM RF switch includes a thermally conductive and electrically insulating segment situated over said heating element.
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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