Recipe optimization based zonal analysis

Patent metadata

Field	Value
Publication number	US-10763146-B2
Application number	US-201715751514-A
Country	US
Kind code	B2
Filing date	Dec 11, 2017
Priority date	May 22, 2017
Publication date	Sep 1, 2020
Grant date	Sep 1, 2020

Abstract

Metrology methods and modules are provided, which comprise carrying out recipe setup procedure(s) and/or metrology measurement(s) using zonal analysis with respect to respective setup parameter(s) and/or metrology metric(s). The zonal analysis comprises relating to spatially variable values of the setup parameter(s) and/or metrology metric(s) across one or more wafers in one or more lots. Wafer zones may be discrete or spatially continuous, and be used to weight one or more parameter(s) and/or metric(s) during any of the stages of the respective setup and measurement processes.

First claim

What is claimed is:

1. A method comprising:
carrying out a recipe setup procedure using zonal analysis with respect to at least one setup parameter, wherein the zonal analysis comprises spatially variable values of the at least one setup parameter across at least one wafer, wherein the zonal analysis is applied during a ranking phase of the recipe setup procedure, and wherein the zonal analysis is carried out with respect to concentric zones configured to distinguish at least a wafer center from wafer edges; and
carrying out metrology measurements on the wafer with a metrology tool using the zonal analysis with respect to at least one metrology metric.

2. The method of claim 1 , wherein the zonal analysis is used during a data collection phase and/or during a detailed sampling phase of the recipe setup procedure.

3. The method of claim 1 , wherein the at least one setup parameter comprises a plurality of setup parameters and wherein the zonal analysis comprises different wafer zones with respect to different parameters.

4. The method of claim 1 , wherein the at least one setup parameter comprises any of: sensitivity, at least one accuracy indicator, at least one target quality indicator, at least one performance indicator and at least one process indicator.

5. The method of claim 1 , wherein the at least one metrology metric comprises a plurality of metrology metrics and wherein the zonal analysis comprises different wafer zones with respect to different metrics.

6. The method of claim 5 , wherein the at least one metrology metric comprises any of: overlay, residuals, tool performance parameters, and quality matrices.

7. The method of claim 1 , wherein the at least one metrology metric comprises any of: overlay, residuals, tool performance parameters, and quality matrices.

8. The method of claim 1 , wherein the zonal analysis is carried out in a spatially continuous manner.

9. The method of claim 8 , wherein the zonal analysis is carried out with respect to tunable spectrum illumination and the at least one setup parameter comprise an illumination wavelength.

10. The method of claim 1 , wherein the zonal analysis is carried out with respect to a plurality of wafers.

11. The method of claim 1 , at least partly carried out by at least one computer processor.

12. A computer program product comprising a non-transitory computer readable storage medium having computer readable program embodied therewith, the computer readable program configured to carry out the method of claim 1 .

13. A metrology module comprising the computer program product of claim 12 .

Assignees

• Kla Tencor Corp

Inventors

• Volkovich Roie
• Adel Michael
• Yerushalmi Liran
• Herzel Eitan
• Ye Mengmeng
• Amit Eran

Classifications

• H10P74/203 Primary

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P74/23 Primary

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• H10P72/0612 Primary

  Production flow monitoring, e.g. for increasing throughput · CPC title

• H10P74/277

  Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers · CPC title

• H10P74/238

  comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement · CPC title