Correction method and correction circuit for sigma-delta modulator

US10742230B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10742230-B2
Application numberUS-201916519739-A
CountryUS
Kind codeB2
Filing dateJul 23, 2019
Priority dateSep 17, 2018
Publication dateAug 11, 2020
Grant dateAug 11, 2020

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A correction method and a correction circuit for a sigma-delta modulator (SDM) are disclosed. The SDM includes a loop filter, a quantizer, and a digital-to-analog converter (DAC), and the loop filter includes a resonator. The correction circuit includes a memory and a control circuit. The memory stores multiple program instructions. The control circuit executes the program instructions to correct the SDM. The correction procedure of the SDM includes the following steps: inputting a test signal to the SDM; obtaining a signal characteristic value of an output signal of the SDM; and adjusting the resonator according to the signal characteristic value.

First claim

Opening claim text (preview).

What is claimed is: 1. A correction method for correcting a sigma-delta modulator (SDM), the SDM comprising a loop filter, a quantizer, and a digital-to-analog converter (DAC), the loop filter comprising a resonator, and the correction method comprising following steps: inputting a test signal to the SDM; obtaining a signal characteristic value of an output signal of the SDM, wherein the signal characteristic value is a signal-to-noise ratio (SNR), an error vector magnitude (EVM), or a noise intensity of the output signal; and adjusting the resonator according to the signal characteristic value. 2. The correction method of claim 1 , wherein the resonator comprises a first integrator, a second integrator, and an impedance, and the step of adjusting the resonator according to the signal characteristic value adjusts the impedance. 3. The correction method of claim 1 , wherein the step of obtaining the signal characteristic value of the output signal of the SDM obtains the signal characteristic value in an operating frequency band of the SDM. 4. A correction circuit for correcting a sigma-delta modulator (SDM), the SDM comprising a loop filter, a quantizer, and a digital-to-analog converter (DAC), the loop filter comprising a resonator, the correction circuit comprising: a memory configured to store a plurality of program instructions; and a control circuit coupled to the memory and configured to execute the program instructions to correct the SDM; wherein the control circuit corrects the SDM by performing following steps: inputting a test signal to the SDM; obtaining a signal characteristic value of an output signal of the SDM, wherein the signal characteristic value is a signal-to-noise ratio (SNR), an error vector magnitude (EVM), or a noise intensity of the output signal; and adjusting the resonator according to the signal characteristic value. 5. The correction circuit of claim 4 , wherein the resonator comprises a first integrator, a second integrator, and an impedance, and the step of adjusting the resonator according to the signal characteristic value adjusts the impedance. 6. The correction circuit of claim 4 , wherein the step of obtaining the signal characteristic value of the output signal of the SDM obtains the signal characteristic value in an operating frequency band of the SDM.

Assignees

Inventors

Classifications

  • H03M3/404Primary

    characterised by the type of bandpass filters used · CPC title

  • Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

  • Testing · CPC title

  • Continuously compensating for, or preventing, undesired influence of physical parameters (periodically, {e.g. by using stored correction values,} H03M1/10) · CPC title

  • H03M3/368Primary

    of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators · CPC title

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What does patent US10742230B2 cover?
A correction method and a correction circuit for a sigma-delta modulator (SDM) are disclosed. The SDM includes a loop filter, a quantizer, and a digital-to-analog converter (DAC), and the loop filter includes a resonator. The correction circuit includes a memory and a control circuit. The memory stores multiple program instructions. The control circuit executes the program instructions to corre…
Who is the assignee on this patent?
Realtek Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification H03M3/404. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).