Sigma delta modulator and method therefor

Patent metadata

Field	Value
Publication number	US-11606102-B2
Application number	US-202117449030-A
Country	US
Kind code	B2
Filing date	Sep 27, 2021
Priority date	Jun 28, 2021
Publication date	Mar 14, 2023
Grant date	Mar 14, 2023

Abstract

A sigma delta modulator comprises an input configured to receive an input analog signal; a summing junction configured to subtract a feedback analog signal from the input analog signal; a first stage including a low pass filter coupled to the summing junction, wherein the low pass filter is configured to generate a first filtered signal; a second stage coupled to the low pass filter, configured to generate a second filtered signal by an active filter; a back-end stage coupled to the second stage, wherein the back-end stage comprises an analog to digital converter configured to convert the 2nd filtered signal to a digital output signal by sampling at a predetermined sampling frequency (fs); and a feedback path for routing the digital output signal to the summing junction, wherein the feedback path comprises a digital to analog converters, DAC, converting the digital output signal to the feedback analog signal.

First claim

What is claimed is:

1. A sigma delta modulator, comprising:
an input configured to receive an input analog signal;
a summing junction coupled to the input, configured to subtract a feedback analog signal from the input analog signal;
a first stage including a low pass filter coupled to the summing junction, wherein the low pass filter is configured to generate a first filtered signal;
a second stage including includes a single-OpAmp resonator, the second stage coupled to the low pass filter and configured to generate a second filtered signal by an active filter, wherein the active filter comprises at least one amplifier where the first filtered signal is chopped at a chopping frequency which is 1/N times of a predetermined sampling frequency;
a back-end stage coupled to the second stage, wherein the back-end stage comprises an analog to digital converter configured to convert the second filtered signal to a digital output signal by sampling at the predetermined sampling frequency; and
a feedback path for routing the digital output signal to the summing junction, wherein the feedback path comprises a digital to analog converter, DAC, converting the digital output signal to the feedback analog signal.

2. The sigma delta modulator as claimed in claim 1 , wherein the low pass filter is a passive low pass filter.

3. The sigma delta modulator as claimed in claim 1 , further comprising a high pass filter coupled between the second stage and the back-end stage.

4. The sigma delta modulator as claimed in claim 1 , further comprising a path where the output of the low pass filter is coupled to the input of the back-end stage.

5. The sigma delta modulator as claimed in claim 1 , wherein the single-OpAmp resonator further comprises a first and a second chopper, wherein the first chopper is coupled at the input of the amplifier and the second chopper is coupled at the output of the amplifier.

6. The sigma delta modulator as claimed in claim 1 , wherein the single-OpAmp resonator further comprises a first chopper, a second chopper, a first amplifier and a second amplifier, wherein the first chopper is coupled at the input of the first amplifier and the second chopper is coupled between the first amplifier and the second amplifier.

7. The sigma delta modulator as claimed in claim 1 , wherein the second stage includes an integrator.

8. The sigma delta modulator as claimed in claim 7 , wherein the integrator further comprises a first chopper, an amplifier and a second chopper, wherein the first chopper is coupled at the input of the amplifier and the second chopper is coupled at the output of the amplifier.

9. The sigma delta modulator as claimed in claim 7 , wherein the integrator further comprises a first chopper, a second chopper, a first amplifier and a second amplifier, wherein the first chopper is coupled at the input of the first amplifier and the second chopper is coupled between the first amplifier and the second amplifier.

10. The sigma delta modulator as claimed in claim 1 , wherein the second stage further includes a first RC network coupled between the low pass filter and the amplifier, a second RC network coupled between the input of the amplifier and the output of the amplifier, and a third RC network coupled between the input of the amplifier and the output of the amplifier.

11. The sigma delta modulator as claimed in claim 10 , wherein the second stage further comprises a first chopper and a second chopper, wherein the first chopper is coupled at the input of the amplifier and the second chopper is coupled at the output of the amplifier.

12. The sigma delta modulator as claimed in claim 10 , wherein the second stage further comprises a first chopper, a second chopper, a first amplifier and a second amplifier, wherein the first chopper is coupled at the input of the first amplifier and the second chopper is coupled between the first amplifier and the second amplifier.

13. The sigma delta modulator as claimed in claim 1 , wherein the digital to analog converters includes main digital to analog converter coupled to the summing junction and the low pass filter includes a resistor and a capacitor, wherein the resistor is coupled between the input of the sigma delta modulator and the output of the digital to analog converter, and the capacitor is coupled between the output of the main digital to analog converter and the ground.

14. The sigma delta modulator as claimed in claim 1 , wherein the digital to analog converter is a finite impulse response (FIR) DAC.

15. A method for converting an analog input signal to a digital signal, the method comprising:
receiving an input analog signal;
subtracting a feedback analog signal from the input analog signal in a summing junction to produce a subtracted signal;
filtering the subtracted signal to generate a first filtered signal by a low pass filter;
generating a second filtered signal by an active filter, a single-OpAmp resonator, or an integrator;
converting the second filtered signal to a digital output signal by sampling at a predetermined sampling frequency;
feeding back the digital output signal to the summing junction via a digital-to-analog converter, DAC, converting the digital output signal to the feedback analog signal.

16. The method as claimed in claim 15 , wherein filtering the subtracted signal to generate a first filtered signal by a low pass filter comprises filtering the subtracted signal by a passive low pass filter.

17. The method as claimed in claim 15 , further comprising filtering the second filtered signal by a high pass filter.

18. The method as claimed in claim 15 , wherein generating a second filtered signal by an active filter comprises chopping the first filtered signal at at least one chopper stabilized amplifier of the active filter at a chopping frequency which is 1/N times of the predetermined sampling frequency.

19. A sigma delta modulator, comprising:
an input configured to receive an input analog signal;
a summing junction coupled to the input, configured to subtract a feedback analog signal from the input analog signal;
a first stage including a low pass filter coupled to the summing junction, wherein the low pass filter is configured to generate a first filtered signal;
a second stage coupled to the low pass filter and configured to generate a second filtered signal by an active filter, the second stage including a first RC network coupled between the low pass filter and the amplifier, a second RC network coupled between the input of the amplifier and the output of the amplifier, and a third RC network coupled between the input of the amplifier and the output of the amplifier, wherein the active filter comprises at least one amplifier where the first filtered signal is chopped at a chopping frequency which is 1/N times of a predetermined sampling frequency;
a back-end stage coupled to the second stage, wherein the back-end stage comprises an analog to digital converter configured to convert the second filtered signal to a digital output signal by sampling at the predetermined sampling frequency; and
a feedback path for routing the digital output signal to the summing junction, wherein the feedback path comprises a digital to analog converter, DAC, converting the digital output signal to the feedback analog signal.

20. The sigma delta modulator as claimed in claim 19 , further comprising a path where the output of the low pass filter is coupled to the input of the back-end stage.

Assignees

• Nxp Bv

Inventors

• Zhang Chenming
• Ganzerli Marcello
• Cenci Pierluigi
• Breems Lucien Johannes

Classifications

• H03M3/454 Primary

  with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage · CPC title

• H03M3/404 Primary

  characterised by the type of bandpass filters used · CPC title

• H03M3/504

  the final digital/analogue converter being constituted by a finite impulse response [FIR] filter, i.e. FIRDAC · CPC title

• H03M3/34

  by chopping · CPC title

• H03M3/45

  with distributed feedforward inputs, i.e. with forward paths from the modulator input to more than one filter stage · CPC title