Controlling fin hardmask cut profile using a sacrificial epitaxial structure

US10741452B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10741452-B2
Application numberUS-201816173378-A
CountryUS
Kind codeB2
Filing dateOct 29, 2018
Priority dateOct 29, 2018
Publication dateAug 11, 2020
Grant dateAug 11, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Methods for forming semiconductor fins include forming a sacrificial semiconductor structure around a hardmask fin on an underlying semiconductor layer. A first etch is performed that partially etches away a portion of the hardmask fin and the sacrificial semiconductor structure with a first etch chemistry. A second etch is performed that etches away remaining material of the portion of the hardmask fin and partially etches remaining material of the sacrificial semiconductor structure with a second etch chemistry. A semiconductor fin is etched from the semiconductor layer using the etched hardmask fin as a mask.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for forming a semiconductor fin, comprising: forming a sacrificial semiconductor structure around a hardmask fin on an underlying semiconductor layer; performing a first etch that partially etches away a portion of the hardmask fin and the sacrificial semiconductor structure at a same time, with a first etch chemistry; performing a second etch that etches away remaining material of the portion of the hardmask fin and partially etches remaining material of the sacrificial semiconductor structure at a same time, with a second etch chemistry; and etching a semiconductor fin from the underlying semiconductor layer using the etched hardmask fin as a mask. 2. The method of claim 1 , wherein forming the sacrificial semiconductor structure comprises epitaxially growing the sacrificial semiconductor structure from a top surface of the underlying semiconductor layer. 3. The method of claim 1 , wherein the second etch leaves a layer of remaining material of the sacrificial semiconductor structure and exposes the underlying semiconductor layer under the portion of the hardmask fin. 4. The method of claim 1 , further comprising etching away remaining portions of the sacrificial semiconductor structure after the second etch. 5. The method of claim 4 , wherein etching away the remaining portions of the sacrificial semiconductor structure employs a third etch chemistry that is selective to the etched hardmask fin and the underlying semiconductor layer. 6. The method of claim 1 , further comprising: forming a mask over the hardmask fin that leaves the portion of the hardmask fin exposed, after forming the sacrificial semiconductor structure. 7. The method of claim 1 , wherein the first etch comprises an etch chemistry selected from the group consisting of CH 3 F and CF x . 8. The method of claim 1 , wherein the second etch comprises an etch chemistry selected from the group consisting of Cl 2 , SF 6 , and HBr. 9. The method of claim 1 , wherein the first and second etch leave a remaining portion of the hardmask fin with substantially vertical sidewalls. 10. The method of claim 1 , further comprising forming a plurality of hardmask fins on the underlying semiconductor layer, wherein forming the sacrificial semiconductor structure around the hardmask fin comprises forming a sacrificial semiconductor structure around all of the plurality of hardmask fins. 11. A method for forming semiconductor fins, comprising: epitaxially growing a sacrificial semiconductor structure around a plurality of hardmask fins from a top surface of an underlying semiconductor layer; performing a first etch that partially etches away a portion of the hardmask fins and the sacrificial semiconductor structure with a first etch chemistry; performing a second etch that etches away remaining material of the portion of the hardmask fins and partially etches remaining material of the sacrificial semiconductor structure with a second etch chemistry that is different from the first etch chemistry, wherein the first and second etch leave a remaining portion of the hardmask fin with substantially vertical sidewalls; and etching a plurality of semiconductor fins from the underlying semiconductor layer using the etched hardmask fins as a mask. 12. The method of claim 11 , wherein the second etch leaves a layer of remaining material of the sacrificial semiconductor structure and exposes the underlying semiconductor layer under the portion of the hardmask fin. 13. The method of claim 11 , further comprising etching away remaining portions of the sacrificial semiconductor structure after the second etch. 14. The method of claim 13 , wherein etching away the remaining portions of the sacrificial semiconductor structure employs a third etch chemistry that is selective to the etched hardmask fins and the underlying semiconductor layer. 15. The method of claim 11 , further comprising: forming a mask over the hardmask fins that leaves the portion of the hardmask fins exposed, after forming the sacrificial semiconductor structure. 16. The method of claim 11 , wherein the first etch comprises an etch chemistry selected from the group consisting of CH 3 F and CF x . 17. The method of claim 11 , wherein the second etch comprises an etch chemistry selected from the group consisting of Cl 2 , SF 6 , and HBr. 18. A method for forming semiconductor fins, comprising: epitaxially growing a sacrificial semiconductor structure around a plurality of hardmask fins from a top surface of an underlying semiconductor layer; forming a mask over the hardmask fins that leaves a portion of the hardmask fins exposed, after forming the sacrificial semiconductor structure; performing a first etch that partially etches away a portion of the hardmask fins and the sacrificial semiconductor structure at the same time with a first etch chemistry; performing a second etch that etches away remaining material of the portion of the hardmask fins and partially etches remaining material of the sacrificial semiconductor structure with a second etch chemistry that is different from the first etch chemistry, wherein the first and second etch leave a remaining portion of the hardmask fins with substantially vertical sidewalls; performing a third etch that etches away remaining portions of the sacrificial semiconductor structure after the second etch and that is selective to the etched hardmask fins and the underlying semiconductor layer; and etching a plurality of semiconductor fins from the underlying semiconductor layer using the etched hardmask fins as a mask. 19. The method of claim 18 , wherein the first etch comprises an etch chemistry selected from the group consisting of CH 3 F and CF x . 20. The method of claim 18 , wherein the second etch comprises an etch chemistry selected from the group consisting of Cl 2 , SF 6 , and HBr.

Assignees

Inventors

Classifications

  • characterised by the processes involved to create the masks · CPC title

  • characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

  • comprising FinFETs · CPC title

  • using dummy structures having essentially the same shapes as the semiconductor bodies, e.g. to provide stability · CPC title

  • the components including FinFETs · CPC title

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What does patent US10741452B2 cover?
Methods for forming semiconductor fins include forming a sacrificial semiconductor structure around a hardmask fin on an underlying semiconductor layer. A first etch is performed that partially etches away a portion of the hardmask fin and the sacrificial semiconductor structure with a first etch chemistry. A second etch is performed that etches away remaining material of the portion of the har…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10D84/0158. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).