Dynamically adjustable multi-line bus shared by multi-protocol devices
US-10007628-B2 · Jun 26, 2018 · US
US10740268B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10740268-B2 |
| Application number | US-201916503056-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 3, 2019 |
| Priority date | Oct 1, 2015 |
| Publication date | Aug 11, 2020 |
| Grant date | Aug 11, 2020 |
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Communication systems and communication control methods are disclosed. In one example, a slave device belonging to a group of devices to which arbitration is applicable sequentially transmits a start bit and a first address including a first bit having a value different from a corresponding first bit of predetermined pattern data. A master device sequentially transmits the start bit and the predetermined pattern data. The master device arbitrates the master device and the first slave device based on the value of the first bit.
Opening claim text (preview).
What is claimed is: 1. A communication system comprising: a master device configured to sequentially transmit a start bit indicating communication start and predetermined pattern data, and to transmit and receive data; a first slave device including a first bus characteristic register, the first slave device being configured to perform at least one of an in-band interrupt request or a secondary master request; and a second slave device including a second bus characteristic register, wherein the second slave device is not configured to perform the in-band interrupt request or the secondary master request, wherein the first bus characteristic register of the first slave device stores a first setting information indicating that the first slave device is configured to perform the secondary master request, the second bus characteristic register of the second slave device stores a second setting information indicating that the second slave device is not configured to perform the secondary master request, and the first bus characteristic register of the first slave device stores a third setting information indicating that the first slave device is configured to perform the in-band interrupt request. 2. The communication system according to claim 1 , wherein the second bus characteristic register of the second slave device stores a fourth setting information indicating that the second slave device is not configured to perform the in-band interrupt request. 3. The communication system according to claim 2 , wherein the first setting information is stored in a set of one or more bits at a first designated location in the first bus characteristic register. 4. The communication system according to claim 3 , wherein the second setting information is stored in a set of one or more bits at the first designated location in the second bus characteristic register. 5. The communication system according to claim 4 , wherein the third setting information is stored in a set of one or more bits at a second designated location in the first bus characteristic register. 6. The communication system according to claim 5 , wherein the fourth setting information is stored in a set of one or more bits at the second designated location in the second bus characteristic register.
using a clocked protocol · CPC title
on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title
with centralised access control · CPC title
using independent requests or grants, e.g. using separated request and grant lines · CPC title
Assignment of addresses or identifiers to the modules of a bus system · CPC title
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