Bonding support structure (and related process) for wafer stacking

Patent metadata

Field	Value
Publication number	US-10734285-B2
Application number	US-201816178819-A
Country	US
Kind code	B2
Filing date	Nov 2, 2018
Priority date	Jun 28, 2018
Publication date	Aug 4, 2020
Grant date	Aug 4, 2020

Abstract

In some embodiments, a method for bonding semiconductor wafers is provided. The method includes forming a first integrated circuit (IC) over a central region of a first semiconductor wafer. A first ring-shaped bonding support structure is formed over a ring-shaped peripheral region of the first semiconductor wafer, where the ring-shaped peripheral region of the first semiconductor wafer encircles the central region of the first semiconductor wafer. A second semiconductor wafer is bonded to the first semiconductor wafer, such that a second IC arranged on the second semiconductor wafer is electrically coupled to the first IC.

First claim

What is claimed is:

1. A method for bonding semiconductor wafers, the method comprising:
forming a plurality of first integrated circuits (ICs) over a first semiconductor wafer and within a perimeter of a central region of the first semiconductor wafer;
forming a first ring-shaped bonding support structure over the first semiconductor wafer and within a ring-shaped peripheral region of the first semiconductor wafer, wherein the ring-shaped peripheral region of the first semiconductor wafer encircles the central region of the first semiconductor wafer; and
bonding a second semiconductor wafer to the first semiconductor wafer, such that a plurality of second ICs disposed over the second semiconductor wafer are electrically coupled to the first ICs, respectively.

2. The method of claim 1 , wherein forming the first ICs comprises:
forming an etch stop layer over a plurality of interconnect structures, wherein the interconnect structures are disposed over the first semiconductor wafer, and wherein each of the interconnect structures correspond to one of the first ICs; and
forming a dielectric layer over the interconnect structures and over the first ring-shaped bonding support structure, wherein the first ring-shaped bonding support structure is formed after the etch stop layer.

3. The method of claim 2 , wherein forming the first ICs further comprises:
performing a first planarization process on the dielectric layer to form a redistribution dielectric layer.

4. The method of claim 3 , wherein the redistribution dielectric layer contacts both the etch stop layer and the first ring-shaped bonding support structure.

5. The method of claim 4 , wherein forming the first ICs further comprises:
forming a bonding interface dielectric layer over the redistribution dielectric layer, wherein the bonding interface dielectric layer has a substantially planar upper surface that extends between opposite outermost edges of the first semiconductor wafer.

6. The method of claim 5 , wherein forming the first ICs further comprises:
before the dielectric layer is formed, performing a second planarization process on the first ring-shaped bonding support structure, such that an upper surface of the first ring-shaped bonding support structure is substantially planar with an upper surface of the etch stop layer.

7. The method of claim 1 , wherein forming the first ICs comprises:
forming a redistribution dielectric layer over a plurality of interconnect structures, wherein the interconnect structures are disposed over the first semiconductor wafer, and wherein each of the interconnect structures correspond to one of the first ICs; and
forming a bonding interface dielectric layer on both the redistribution dielectric layer and the first ring-shaped bonding support structure, wherein the first ring-shaped bonding support structure is formed after the redistribution dielectric layer.

8. The method of claim 7 , wherein the first ring-shaped bonding support structure has a rounded outer sidewall that extends from about an upper surface of the redistribution dielectric layer to the first semiconductor wafer.

9. The method of claim 1 , wherein forming the first ICs comprises:
forming a bonding structure over a plurality of interconnect structures, wherein the interconnect structures are disposed over the first semiconductor wafer, wherein each of the interconnect structures correspond to one of the first ICs, wherein the bonding structure comprises a conductive bonding link disposed in a bonding interface dielectric layer, and wherein the first ring-shaped bonding support structure is formed after the bonding structure.

10. The method of claim 9 , wherein an upper surface of the first ring-shaped bonding support structure is substantially planar with both an upper surface of the conductive bonding link and an upper surface of the bonding interface dielectric layer.

11. The method of claim 1 , wherein a diameter of the central region of the first semiconductor wafer is between about 92 percent of a diameter of the first semiconductor wafer and about 99.8 percent of the diameter of the first semiconductor wafer.

12. The method of claim 11 , wherein the first ring-shaped bonding support structure has a ring thickness that is between about 0.1 percent of the diameter of the first semiconductor wafer and about 4 percent of the diameter of the first semiconductor wafer.

13. The method of claim 1 , further comprising:
forming a second ring-shaped bonding support structure over the second semiconductor wafer and within a ring-shaped peripheral region of the second semiconductor wafer;
wherein the ring-shaped peripheral region of the second semiconductor wafer encircles a central region of the second semiconductor wafer;
wherein the second ICs are disposed over the second semiconductor wafer and within a perimeter of the central region of the second semiconductor wafer; and
wherein bonding the first semiconductor wafer to the second semiconductor wafer forms a dielectric-to-dielectric bond between the first ring-shaped bonding support structure and the second ring-shaped bonding support structure.

14. A method for bonding semiconductor wafers, the method comprising:
forming a plurality of stacked interlayer dielectric (ILD) layers on a first side of a first semiconductor wafer, wherein the plurality of stacked ILD layers have a first thickness over a central region of the first semiconductor wafer and a second thickness over a ring-shaped peripheral region of the first semiconductor wafer, wherein the second thickness is less than the first thickness, wherein the ring-shaped peripheral region encircles the central region and extends from the central region to an outermost edge of the first semiconductor wafer, and wherein, in the ring-shaped peripheral region, a thickness of the first semiconductor wafer continuously decreases from the central region to the outermost edge;
forming a ring-shaped bonding support structure comprising a layer of dielectric material within the ring-shaped peripheral region after formation of one or more of the plurality of stacked ILD layers, wherein the layer of dielectric material has a sidewall facing a side of one or more of the plurality of stacked ILD layers; and
bonding a second semiconductor wafer to the first side of the first semiconductor wafer.

15. The method of claim 14 , wherein an outermost surface of the ring-shaped bonding support structure is spaced a greater distance from the central region than the outermost edge.

16. The method of claim 14 , wherein the ring-shaped bonding support structure extends from the first side of the first semiconductor wafer to beyond a mid-line axis of the first semiconductor wafer, wherein the mid-line axis extends laterally through the first semiconductor wafer and is evenly spaced from the first side of the first semiconductor wafer and a second side of the first semiconductor wafer opposite the first side.

17. The method of claim 14 , wherein the ring-shaped bonding support structure is devoid of metal interconnect layers.

18. The method of claim 14 , wherein forming the ring-shaped bonding support structure comprises:
performing a chemical vapor deposition (CVD) process to selectively form the ring-shaped bonding support structure over the ring-shaped peripheral region, wherein the ring-shaped bonding support structure comprises an oxide, a nitride, or an oxynitride.

19. A plurality of bonded together semiconductor wafers, comprising:
a plurality of stacked interlayer dielectric (IL

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Li Sheng-Chan
• Chou Cheng-Hsien
• Tsai Cheng-Yuan
• Huang Chih-Hui
• Wu Kuo-Ming

Classifications

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W70/05

  of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W72/90

  Bond pads, in general · CPC title

• H10W72/019

  of bond pads · CPC title