System and method for generation of wafer inspection critical areas

US10706522B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10706522-B2
Application numberUS-201615394545-A
CountryUS
Kind codeB2
Filing dateDec 29, 2016
Priority dateNov 8, 2016
Publication dateJul 7, 2020
Grant dateJul 7, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method includes receiving one or more sets of wafer data, identifying one or more primitives from one or more shapes in one or more layers in the one or more sets of wafer data, classifying each of the one or more primitives as a particular primitive type, identifying one or more primitive characteristics for each of the one or more primitives, generating a primitive database of the one or more primitives, generating one or more rules based on the primitive database, receiving one or more sets of design data, applying the one or more rules to the one or more sets of design data to identify one or more critical areas, and generating one or more wafer inspection recipes including the one or more critical areas for an inspection sub-system.

First claim

Opening claim text (preview).

What is claimed: 1. A system for generating one or more wafer inspection recipes for wafer inspection comprising: an inspection sub-system; and a controller communicatively coupled to the inspection sub-system, wherein the controller includes one or more processors configured to execute a set of program instructions stored in memory, wherein the program instructions are configured to cause the one or more processors to: receive one or more sets of wafer data, wherein the one or more sets of wafer data include one or more layers, wherein the one or more layers include one or more shapes; identify one or more primitives from the one or more shapes; classify each of the one or more primitives as a particular primitive type; identify one or more primitive characteristics for each of the one or more primitives; generate a primitive database of the one or more primitives, wherein the primitive database includes the particular primitive type and the one or more primitive characteristics for each of the one or more primitives; generate one or more rules based on the primitive database; receive one or more sets of design data; apply the one or more rules to the one or more sets of design data to identify one or more critical areas, wherein the one or more rules associate the one or more of primitives in one or more patterned arrangements in the one or more sets of design data to one or more potential failure sites, wherein the one or more potential failure sites include one or more potential sites of electrical intent failure; generate one or more wafer inspection recipes for the inspection sub-system, wherein the one or more wafer inspection recipes include the one or more critical areas, wherein a particular critical area includes the one or more potential failure sites; and transmit the inspection recipe to the inspection sub-system for inspection of one or more wafers. 2. The system in claim 1 , wherein the one or more sets of wafer data comprise one or more design clips. 3. The system in claim 2 , wherein the one or more design clips include one or more binary design images. 4. The system in claim 3 , wherein the one or more binary design images include a pattern and a background, wherein the pattern has a value 1 and the background has a value 0. 5. The system in claim 2 , wherein the one or more design clips are described in one or more textual descriptions. 6. The system in claim 1 , wherein the one or more sets of wafer data comprise one or more high-resolution inspection images. 7. The system in claim 1 , wherein the one or more sets of wafer data comprise one or more sets of simulation data received from a simulation sub-system. 8. The system in claim 1 , wherein the program instructions are configured to cause the one or more processors to: classify the one or more primitives as a particular primitive type by executing a primitive extraction engine. 9. The system in claim 1 , wherein the program instructions are configured to cause the one or more processors to: identify one or more primitive characteristics of the one or more primitives by executing a primitive extraction engine. 10. The system in claim 1 , wherein the program instructions are configured to cause the one or more processors to: generate the primitive database by executing a primitive extraction engine. 11. The system in claim 1 , wherein the program instructions are configured to cause the one or more processors to: generate the one or more rules based on the primitive database by executing a rule-script generator. 12. The system in claim 1 , wherein the one or more critical areas are identified in the one or more sets of design data by executing a rule-script execution engine, wherein the one or more critical areas satisfy one or more constraints in one or more executable scripts, wherein the one or more executable scripts are generated by executing a rule-script generator, wherein the one or more executable scripts include the one or more rules. 13. The system in claim 1 , wherein the particular primitive type comprises: at least one of a line or a corner. 14. The system in claim 1 , wherein the one or more primitive characteristics comprise: at least one of a thick line, a medium line, a thin line, a line end, a line side, a convex corner, a concave corner, or a shape interaction, wherein the shape interaction includes at least one of a spatial location of the one or more primitives, a spatial orientation of the one or more primitives, or a spacing between two or more primitives. 15. The system in claim 1 , wherein the primitive database comprises: at least one of a list, a table, or a formatted text data file. 16. The system in claim 1 , wherein the inspection sub-system comprises: at least one of an electron-beam inspection sub-system or an optical inspection sub-system capable of generating one or more high-resolution images. 17. A method for generating one or more wafer inspection recipes for wafer inspection comprising: receiving one or more sets of wafer data, wherein the one or more sets of wafer data include one or more layers, wherein the one or more layers include one or more shapes; identifying one or more primitives from the one or more shapes; classifying each of the one or more primitives as a particular primitive type; identifying one or more primitive characteristics for each of the one or more primitives; generating a primitive database of the one or more primitives, wherein the primitive database includes the particular primitive type and the one or more primitive characteristics for each of the one or more primitives; generating one or more rules based on the primitive database; receiving one or more sets of design data; applying the one or more rules to the one or more sets of design data to identify one or more critical areas, wherein the one or more rules associate the one or more of primitives in one or more patterned arrangements in the one or more sets of design data to one or more potential failure sites, wherein the one or more potential failure sites include one or more potential sites of electrical intent failure; generating one or more wafer inspection recipes for an inspection sub-system, wherein the one or more wafer inspection recipes include the one or more critical areas, wherein a particular critical area includes the one or more potential failure sites; and transmitting the inspection recipe to the inspection sub-system for inspection of one or more wafers. 18. The method in claim 17 , wherein the one or more sets of wafer data comprise one or more design clips. 19. The method in claim 18 , wherein the one or more design clips include one or more binary design images. 20. The method in claim 19 , wherein the one or more binary design images include a pattern and a background, wherein the pattern has a value 1 and the background has a value 0. 21. The method in claim 18 , wherein the one or more design clips are described in one or more textual descriptions. 22. The method in claim 17 , wherein the one or more sets of wafer data comprise one or more high-resolution inspection images. 23. The method in claim 17 , wherein the one or more sets of wafer data comprise one or more sets of simulation data received from a simulation sub-system. 24. The method in claim 17 , further comprising: classifying the one or more primitives as a particular primitive type by executing a primitive extr

Assignees

Inventors

Classifications

  • H10P74/203Primary

    Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • H10P74/277Primary

    Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers · CPC title

  • comprising optical enhancement of defects or not-directly-visible states · CPC title

  • Apparatus for monitoring, sorting, marking, testing or measuring · CPC title

  • Production flow monitoring, e.g. for increasing throughput · CPC title

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Frequently asked questions

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What does patent US10706522B2 cover?
A method includes receiving one or more sets of wafer data, identifying one or more primitives from one or more shapes in one or more layers in the one or more sets of wafer data, classifying each of the one or more primitives as a particular primitive type, identifying one or more primitive characteristics for each of the one or more primitives, generating a primitive database of the one or mo…
Who is the assignee on this patent?
Kla Tencor Corp
What technology area does this patent fall under?
Primary CPC classification H10P74/203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 07 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).