Configurable wideband split LNA

Patent metadata

Field	Value
Publication number	US-10700650-B1
Application number	US-201916242883-A
Country	US
Kind code	B1
Filing date	Jan 8, 2019
Priority date	Jan 8, 2019
Publication date	Jun 30, 2020
Grant date	Jun 30, 2020

Abstract

Methods and devices addressing design of wideband LNAs with gain modes are disclosed. The disclosed teachings can be used to reconfigure RF receiver front-end to operate in various applications imposing stringent and conflicting requirements. Wideband and narrowband input and output matching with gain modes using a combination of the same hardware and a switching network are also disclosed. The described methods and devices also address carrier aggregation requirements and provide solutions that can be used both in single-mode and split-mode operations.

First claim

What is claimed is:

1. A Radio Frequency (RF) receiver front-end comprising:
an input and a plurality of outputs;
a reconfigurable low noise amplifier (LNA) block having an input matching network, and a plurality of electronic elements each having an electronic element output;
an output matching network having a plurality of output matching elements; and
a switching network;
wherein:
each output matching element of the plurality of output matching elements is connected with a corresponding output of the plurality of outputs;
the switching network is connected to the input matching network, the LNA block and the output matching network;
during a first mode of operation:
i) in a first configuration, switches of the switching network:
enable a single electronic element of the plurality of electronic elements and a corresponding output matching element; and
disable remaining electronic elements of the plurality of electronic elements and corresponding output matching elements;

ii) the RF receiver front-end is configured to receive an input signal at the input and generate a corresponding output signal at an output of the plurality of outputs, and

during a second mode of operation:
i) in a second configuration, the switches of the plurality of switches enable two or more electronic elements of the plurality of electronic elements and corresponding output matching elements of the plurality of output matching elements; and
ii) the RF receiver front-end is configured to receive the input signal at the input and generate two or more corresponding output signals at two or more outputs of the plurality of outputs.

2. The RF receiver front-end of claim 1 , wherein the switching network is used to configure or reconfigure the RF receiver front-end to operate at one or more frequency ranges.

3. The RF receiver front-end of claim 2 , wherein the one or more frequency ranges comprises at least a narrowband, and a wideband frequency range.

4. The RF receiver front-end of claim 3 , wherein the narrowband and the wideband frequency ranges are intra-band, non-contiguous frequency ranges.

5. The RF receiver front-end of claim 4 , wherein the plurality of output matching elements comprises each one of a) one or more passive elements, b) one or more active elements, or a combination thereof.

6. The RF receiver front-end of claim 5 , wherein the RF receiver front-end comprises a feedback network selectively connecting one or more electronic element outputs to a gate of an input transistor, the input transistor being configured to receive the input signal.

7. The RF receiver front-end of claim 6 , wherein the feedback network comprises one or more resistors.

8. The RF receiver front-end of claim 7 , wherein the input matching network further comprises:
a first input matching network inductor connected to the gate of the input transistor;
a second input matching inductor connecting a source of the input transistor to ground; and
an input matching capacitor selectively connectable across a gate-source of the input transistor.

9. The RF receiver front-end of claim 8 , wherein the input matching capacitor is a variable capacitor.

10. The RF receiver front-end of claim 6 , wherein the one or more active elements comprise a first source-follower transistor implemented in a source-follower configuration.

11. The RF receiver front-end of claim 10 , wherein a source of the first source-follower transistor is connected to a first current source or to a first inductor.

12. The RF receiver front-end of claim 11 , wherein a gate of the first source-follower transistor is selectively connectable to a corresponding electronic element output or to ground, and wherein the source of the first source-follower transistor is selectively connectable to a corresponding electronic element output and/or to a corresponding output of the plurality of outputs.

13. The RF receiver front-end of claim 12 , wherein a drain of the first source-follower transistor is configured to receive a first bias voltage.

14. The RF receiver front-end of claim 13 , wherein two or more passive elements of the one or more passive elements are selectively inter-connectable to one another.

15. The RF receiver front-end of claim 14 , wherein the one or more passive elements is configured to receive a second bias voltage, and wherein the one or more passive elements is selectively connectable to a corresponding output of the plurality of outputs.

16. The RF receiver front-end of claim 15 , wherein at least one passive element of the one or more passive elements is selectively connectable to a corresponding electronic element output.

17. The RF receiver front-end of claim 16 , wherein the one or more passive elements comprises a plurality of inductors, a plurality of capacitors and a plurality of resistors.

18. The RF receiver front-end of claim 17 , wherein:
at least one inductor of the plurality of inductors is a variable inductor,
at least one capacitor of the plurality of capacitors is a variable capacitor; and
at least one resistor of the plurality of resistors is a variable resistor.

19. The RF receiver front-end of claim 9 , wherein a narrowband input matching is performed by a) opening a first switch of the switching network, thereby disconnecting the gate of the input transistor from the corresponding electronic element output, b) closing a second switch of the switching network, thereby connecting the input matching capacitor across the gate-source of the input transistor, or a combination of a) and b).

20. The RF receiver front-end of claim 9 , wherein a wideband input matching is performed by a) closing a first switch of the switching network, thereby connecting the gate of the input transistor through the feedback network with the corresponding electronic elements output, and b) opening a second switch of the switching network thereby switching out the input matching capacitor.

21. The RF receiver front-end of claim 16 , wherein a wideband output matching is performed by:
connecting the gate of the first source-follower transistor to the corresponding electronic element output;
disconnecting the one or more passive element from a corresponding output of the plurality of outputs; and
connecting the source of the first source-follower transistor to a corresponding output of the plurality of outputs.

22. The RF receiver front-end of claim 16 , wherein a wideband output matching is performed by closing a subset of switches of the switching network to inter-connect a subset of passive elements of the one or more passive elements.

23. The RF receiver front-end claim 17 configured such that the input signal experiences a first gain or a second gain from the input to an output of the plurality of outputs, wherein:
the first gain is achieved by selectively switching in a de-Qing resistor of the plurality of resistor;
the second gain is achieved by selectively switching out the de-Qing resistor of the plurality if resistor; and
the first gain is smaller than the second gain.

24. The RF receiver front-end of claim 5 , wherein the input transistor and the cascode transistor are field-effect-transistors (FETs) or metal-oxide filed-effect-transistors (MOSFETs).

25. The RF receiver front-end of claim 1 implemented on a single die or chip.

26. The RF receiver front-end of claim 12 , wherein at least one output matching of the plurality

Assignees

• Psemi Corp

Inventors

• Ayranci Emre
• Sanner Miles
• Yerramilli Phanindra

Classifications

• H04B1/18

  Input circuits, e.g. for coupling to an antenna or a transmission line (coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H) · CPC title

• H03F2200/489

  A coil being added in the source circuit of a common source stage, e.g. as degeneration means · CPC title

• H03F2200/213

  A variable capacitor being added in the input circuit, e.g. base, gate, of an amplifier stage · CPC title

• H03F1/223

  with MOSFET's · CPC title

• H03F2200/387

  A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title