Voltage boost circuit

Patent metadata

Field	Value
Publication number	US-10699771-B2
Application number	US-201916507710-A
Country	US
Kind code	B2
Filing date	Jul 10, 2019
Priority date	Jul 10, 2014
Publication date	Jun 30, 2020
Grant date	Jun 30, 2020

Abstract

A voltage boost circuit for eDram using thin oxide field effect transistors (FETs) is disclosed. The voltage boost circuit includes a boost capacitor which is precharged with a precharge voltage in a precharge stage and which provides a boosted supply voltage to a thin oxide FET during a pump phase. The voltage boost circuit further include a drive capacitor which provides a turn on voltage to the thin oxide FET so that the boosted supply voltage can pass to an output node in the pump phase.

First claim

What is claimed:

1. A method comprising:
charging a boost capacitor and a drive capacitor with a supply voltage;
providing a boosted voltage of the charged boost capacitor to a FET during a pump phase; and
providing a turn on voltage from the charged drive capacitor to the FET so that the boosted supply voltage can pass to an output node during the pump phase,
wherein the FET is gated by an output gate voltage which is charged by a drive-cap precharge circuit.

2. The method of claim 1 , wherein the boosted voltage is approximately 2× of the supply voltage.

3. The method of claim 1 , wherein the boosted voltage is below a reliability limit of the FET.

4. The method of claim 1 , wherein a voltage difference between a source and a drain of the FET is below a reliability limit of the FET.

5. The method of claim 1 , wherein the FET is turned off during the pump phase.

6. The method claim 1 , wherein the drive capacitor is charged by the drive-cap precharge circuit during a precharge stage.

7. The method of claim 6 , wherein the boosted voltage is provided to a node of the FET during the pump phase by opening a plurality of transistors coupled to the FET.

8. The method of claim 7 , further comprising tailoring a current during the charge phase and the pump phase with a bias generator to provide a functional transfer of signal XL 1 to the drive-cap precharge circuit.

9. The method of claim 1 , further comprising supplying a first terminal of the boost capacitor with the supply voltage and turning on a second transistor to provide GND to a second terminal of the boost capacitor.

10. The method of claim 1 , further comprising turning on a third transistor during the pump phase to add the supply voltage to the boost capacitor to obtain the boosted voltage.

Assignees

• IBM

Inventors

• Fifield John A
• Pontius Dale E

Classifications

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• G11C11/4085 Primary

  Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• G11C11/4074

  Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits · CPC title

• H05K999/99

  Electricity · mapped topic