High surge bi-directional transient voltage suppressor

US10692851B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10692851-B2
Application numberUS-201816178071-A
CountryUS
Kind codeB2
Filing dateNov 1, 2018
Priority dateMar 31, 2017
Publication dateJun 23, 2020
Grant dateJun 23, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A transient voltage suppressor (TVS) is constructed as an NPN bipolar transistor including individually optimized collector-base and emitter-base junctions both with avalanche mode breakdown. The TVS device is constructed using a base that includes a lightly doped base region bordered by a pair of more heavily doped base regions. The two more heavily doped base regions are used to form the collector-base junction and the emitter-base junction both as avalanche breakdown junctions. The lightly doped base region between the collector-base and emitter-base doping regions ensures low leakage current in the TVS device. In this manner, the TVS bipolar transistor of the present invention provides high surge protection with robust clamping while ensuring low leakage current.

First claim

Opening claim text (preview).

What is claimed is: 1. A transient voltage suppressing (TVS) device, comprising: a semiconductor substrate of a first conductivity type, the substrate being heavily doped; a first epitaxial layer of the first conductivity type formed on the substrate, the first epitaxial layer having a first thickness; a second epitaxial layer of a second conductivity type, the second conductivity type opposite the first conductivity type, formed on the first epitaxial layer; a first body region of the second conductivity type formed at a first surface in the second epitaxial layer; a first heavily doped region of the first conductivity type formed in the first body region at the first surface of the second epitaxial layer; and a second body region of the second conductivity type formed at a junction of the first heavily doped region and the first body region, the second body region being more heavily doped than the first body region, wherein the semiconductor substrate forms an emitter, the first heavily doped region forms a collector, and the second epitaxial layer, the first body region and the second body region form a base of the TVS device, the first body region and the second body region and the first heavily doped region forming a collector-base junction being an avalanche junction. 2. The TVS device of claim 1 , wherein the second body region comprises a plurality of doped regions dispersed at the junction of the first heavily doped region and the first body region. 3. The TVS device of claim 2 , wherein the plurality of doped regions of the second body region comprises doped regions of the second conductivity type arranged in a grid pattern at the junction of the first heavily doped region and the first body region. 4. The TVS device of claim 3 , wherein the second buried layer has a doping level selected to optimize a breakdown voltage of the TVS device, the first body region and the second body region has doping levels selected to optimize a blocking voltage of the TVS device, the second buried layer and the first body region having the same or different doping levels. 5. The TVS device of claim 3 , further comprising: a first trench isolation structure formed encircling an active area of the TVS device to provide isolation of the TVS device. 6. The TVS device of claim 5 , wherein the first trench isolation structure comprises a trench formed extending to the first buried layer, the trench being lined with an oxide layer and filled with a polysilicon layer. 7. The TVS device of claim 5 , wherein the first trench isolation structure comprises a trench formed extending to the first buried layer and filled with an oxide layer. 8. The TVS device of claim 3 , wherein the first and second buried layers are formed at the same junction depth on the first epitaxial layer. 9. The TVS device of claim 8 , wherein the second buried layer includes a portion extending over the first buried layer, the portion being formed on the first buried layer between the first buried layer and the first body region. 10. The TVS device of claim 3 , wherein the second buried layer is formed at a junction depth deeper in the first epitaxial layer than the junction depth of the first buried layer. 11. The TVS device of claim 1 , further comprising: a first buried layer of the first conductivity type and a second buried layer of the second conductivity type formed on the first epitaxial layer, the first buried layer being formed around an outer perimeter adjacent and surrounding the second buried layer, wherein the base of the TVS device comprises a first base region formed by the first body region and the second body region, and a second base region formed by the second buried layer, the first and second base regions being more heavily doped than the second epitaxial layer, the first base region and the first heavily doped region forming a collector-base junction being a first avalanche junction, the second base region and the semiconductor substrate forming an emitter-base junction being a second avalanche junction. 12. The TVS device of claim 1 , further comprising: a first trench isolation structure formed encircling an active area of the TVS device to provide isolation of the TVS device; and a first buried layer of the first conductivity type and a second buried layer of the second conductivity type formed on the first epitaxial layer, the first buried layer extending across the active area of the TVS device encircled by the first trench isolation structure, the second buried layer being formed over the first buried layer between the first buried layer and the first body region and in a central portion of the TVS device. 13. The TVS device of claim 12 , wherein the second buried layer has a doping level selected to optimize a breakdown voltage of the TVS device, the first body region and the second body region has doping levels selected to optimize a blocking voltage of the TVS device, the second buried layer and the first body region having the same or different doping levels. 14. The TVS device of claim 12 , further comprising: a sinker diffusion region of the first conductivity type formed in the active area of the TVS device adjacent the first trench isolation structure, the sinker diffusion region extending from the first surface of the second epitaxial layer to the first buried layer; and a second heavily doped region of the second conductivity type formed at the first surface of the second epitaxial layer and in electrical and physical contact with the sinker diffusion region. 15. The TVS device of claim 14 , where in the sinker diffusion region and the second heavily doped region are formed a first distance away from the first heavily doped region, the first distance being selected to protect the TVS device from lateral injection from the junction between the sinker diffusion region and the second heavily doped region. 16. The TVS device of claim 1 , further comprising: a first trench isolation structure formed encircling an active area of the TVS device to provide isolation of the TVS device; and a first buried layer of the first conductivity type and a second buried layer of the second conductivity type formed on the first epitaxial layer, the first buried layer is formed around an outer perimeter surrounding the second buried layer, the first trench isolation structure extending into the first buried layer, and the second buried layer is formed at a junction depth deeper in the first epitaxial layer than the junction depth of the first buried layer. 17. The TVS device of claim 16 , further comprising: a sinker diffusion region of the first conductivity type formed in the active area of the TVS device adjacent the first trench isolation structure, the sinker diffusion region extending from the first surface of the second epitaxial layer to the first buried layer; and a second heavily doped region of the second conductivity type formed at the first surface of the second epitaxial layer and in electrical and physical contact with the sinker diffusion region. 18. The TVS device of claim 17 , further comprising: a second trench isolation structure formed in the active area of the TVS device and encircling a portion of the active area of the TVS device, the second trench isolation structure being formed adjacent the sinker diffusion region, the sinker diffusion region being formed between the first trench isolation structure and the second trench isolation structure, wherein the second trench isolation structure protects the TVS device from lateral injection from the

Assignees

Inventors

Classifications

  • Impurity distributions or concentrations · CPC title

  • Inverted vertical BJTs · CPC title

  • Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) · CPC title

  • Recessed field plates, e.g. trench field plates or buried field plates · CPC title

  • comprising multiple field plate segments · CPC title

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What does patent US10692851B2 cover?
A transient voltage suppressor (TVS) is constructed as an NPN bipolar transistor including individually optimized collector-base and emitter-base junctions both with avalanche mode breakdown. The TVS device is constructed using a base that includes a lightly doped base region bordered by a pair of more heavily doped base regions. The two more heavily doped base regions are used to form the coll…
Who is the assignee on this patent?
Alpha & Omega Semiconductor Cayman Ltd
What technology area does this patent fall under?
Primary CPC classification H10D89/711. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 23 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).