Semiconductor device with photonic and electronic functionality and method for manufacturing a semiconductor device

Patent metadata

Field	Value
Publication number	US-10684412-B2
Application number	US-201615757645-A
Country	US
Kind code	B2
Filing date	Aug 25, 2016
Priority date	Sep 10, 2015
Publication date	Jun 16, 2020
Grant date	Jun 16, 2020

Abstract

A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.

First claim

The invention claimed is:

1. A semiconductor device with photonic and electronic functionality, comprising:
a semiconductor substrate comprising a plurality of electronic circuit elements;
a first metallization stack arranged on the substrate, comprising electrically insulating layers and at least one metallization layer; and
a second metallization stack arranged on the first metallization stack, comprising further electrically insulating layers and an optical waveguide layer;
wherein:
the optical waveguide layer comprises at least one optical waveguide structure;
one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers; and
there is an absence of material between the one of the electrically insulating layers and the one of the further electrically insulating layers that are in direct contact with each other.

2. The semiconductor device according to claim 1 , wherein the second metallization stack comprises at least one further metallization layer and the semiconductor device further comprises at least one opening extending at least partially through the first metallization stack and at least partially through the second metallization stack, wherein
the at least one opening exposes a first metallization layer of the at least one metallization layer and a second metallization layer of the at least one further metallization layer; and
the first and the second metallization layer are electrically connected by a connection material covering the at least one opening at least partially.

3. The semiconductor device according to claim 1 , further comprising at least one optical coupling component designed to receive a beam of incoming light from outside of the semiconductor device and to feed a light input signal into the at least one optical waveguide structure based on the received beam of incoming light.

4. The semiconductor device according to claim 3 , further comprising at least one optical processing component designed to process the light input signal and to generate an electrical output signal and/or a light output signal based on the processing of the light input signal.

5. The semiconductor device according to claim 1 , wherein the plurality of electronic circuit elements comprises active electronic components, in particular comprises transistor circuitry.

6. The semiconductor device according to claim 1 , further comprising at least one through-substrate-via, TSV, for providing an electrical contact between the first metallization stack and an external component, wherein the at least one TSV extends throughout the substrate and partially through the first metallization stack.

7. The semiconductor device according to claim 1 , further comprising a further substrate arranged on a side of the second metallization stack facing away from the first metallization stack.

8. The semiconductor device according to claim 7 , further comprising at least one further TSV for providing an electrical contact between the second metallization stack and an external component, wherein the at least one further TSV extends throughout the further substrate and partially through the second metallization stack.

9. A method for manufacturing a semiconductor device with photonic and electronic functionality, the method comprising:
providing a first wafer comprising:
a semiconductor substrate comprising a plurality of electronic circuit elements; and
a first metallization stack arranged on the substrate, comprising electrically insulating layers and at least one metallization layer;

providing a second wafer comprising:
a further substrate; and
a second metallization stack arranged on the further substrate, comprising further electrically insulating layers and an optical waveguide layer, the optical waveguide layer comprising at least one optical waveguide structure; and

connecting the first metallization stack and the second metallization stack by connecting one of the electrically insulating layers and one of the further electrically insulating layers with a direct bonding method, such that there is an absence of material between the one of the electrically insulating layers and the one of the further electrically insulating layers.

10. The method according to claim 9 , wherein the connecting of the first metallization stack and the second metallization stack comprises:
planarizing a surface of the one of the electrically insulating layers and a surface of the one of the further electrically insulating layers; and
connecting the one of the electrically insulating layers and the one of the further electrically insulating layers by means of the direct bonding method after the planarizing.

11. The method according to claim 9 , further comprising at least partially removing the semiconductor substrate and/or the further substrate after the connecting of the first metallization stack and the second metallization stack.

12. The method according to claim 9 , wherein the connecting of the first metallization stack and the second metallization stack comprises connecting the first and the second wafer face-to-face by means of the direct bonding method.

13. The method according to claim 9 , further comprising:
connecting the second wafer and a handling wafer face-to-face;
removing the further substrate after the connecting of the second wafer and the handling wafer; and
connecting the first wafer and the handling wafer face-to-face by means of the direct bonding method.

14. The method according to claim 13 , wherein
the second wafer comprises at least one optical coupling component designed to receive a beam of incoming light from outside of the semiconductor device and to feed a light input signal into the at least one optical waveguide structure based on the received beam of incoming light; and
the method further comprises opening at least one further opening extending throughout the first metallization stack and partially through the second metallization stack and exposing the at least one optical coupling component.

15. The method according to claim 9 , wherein
the second metallization stack of the second wafer comprises at least one further metallization layer; and the method further comprises
opening at least one opening extending at least partially through the first metallization stack and at least partially through the second metallization stack, wherein the at least one opening exposes a first metallization layer of the at least one metallization layer and a second metallization layer of the at least one further metallization layer; and
forming a connection material connecting the first and the second metallization layer and covering at least partially the at least one opening.

16. A semiconductor device with photonic and electronic functionality, comprising:
a semiconductor substrate comprising a plurality of electronic circuit elements;
a first metallization stack arranged on the substrate, comprising electrically insulating layers and at least one metallization layer; and
a second metallization stack arranged on the first metallization stack, comprising further electrically insulating layers and an optical waveguide layer;
wherein:
the optical waveguide layer comprises at least one optical waveguide structure;
one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers; and
there is an absence of an intermediate layer or a connection material betw

Assignees

• Ams Ag

Inventors

• Kraft Jochen
• Siegert Joerg

Classifications

• H10W90/792

  between multiple chips · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W80/327

  characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers · CPC title

• H10W72/9415

  relative to the surface, e.g. recessed, protruding · CPC title