Leadframe having organic, polymerizable photo-imageable adhesion layer

Patent metadata

Field	Value
Publication number	US-10672692-B2
Application number	US-201715820266-A
Country	US
Kind code	B2
Filing date	Nov 21, 2017
Priority date	Sep 30, 2016
Publication date	Jun 2, 2020
Grant date	Jun 2, 2020

Abstract

A lead frame that is partially covered with an adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame and using a photo-imageable polyimide or epoxy material to form the adhesion layer. A method for forming a lead frame with an adhesion layer starting with a lead frame blank and using a photo-imageable polyimide or epoxy material to form the adhesion layer.

First claim

What is claimed is:

1. A packaged integrated circuit (IC), comprising:
a lead from a lead frame;
a solderable pad located on a top horizontal surface of the lead;
a surface mount pad located on a bottom horizontal surface of the lead;
an IC chip attached to the solderable pad with an adhesive or a solder joint;
molding compound covering portions of the IC chip and the lead; and
an organic adhesion layer that covers a portion of the lead, the organic adhesion layer contacting the molding compound but not contacting the IC chip, the organic adhesion layer covering a portion of the bottom horizontal surface of the lead and covering an outer portion of the surface mount pad;
wherein the organic adhesion layer is polyimide or an epoxy material with a thickness in the range of 1 um to 50 um.

2. The packaged integrated circuit (IC) of claim 1 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead.

3. The packaged integrated circuit (IC) of claim 1 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead and covers an outer portion of the solderable pad.

4. The packaged integrated circuit (IC) of claim 1 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead, and covers a portion of a vertical surface of the lead.

5. The packaged integrated circuit (IC) of claim 1 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead, covers a portion of a vertical surface of the lead, and covers an outer portion of the solderable pad.

6. The packaged integrated circuit (IC) of claim 1 , further including an integrated circuit coupled to the solderable pad with a solder joint wherein a width of the solder joint is defined by a width of an opening in the organic adhesion layer over the solderable pad and wherein a height of the solder joint is greater than a thickness of the organic adhesion layer.

7. The packaged integrated circuit (IC) of claim 1 , further including an integrated circuit coupled to the solderable pad with a solder joint; the lead and integrated circuit encapsulated with molding compound wherein a first surface of the organic adhesion layer adheres to the lead and wherein a second surface of the organic adhesion layer adheres to the molding compound.

8. The packaged integrated circuit (IC) of claim 1 , further including a circuit board surface mount pad on an integrated circuit board coupled to the lead surface mount pad with a solder joint wherein a width of the solder joint is defined by a width of an opening in the organic adhesion layer over a lead surface mount pad and wherein a height of the solder joint is greater than a thickness of the organic adhesion layer.

9. The packaged integrated circuit (IC) of claim 1 , further including covalent bonds between the molding compound and the organic adhesion layer.

10. A packaged integrated circuit (IC), comprising:
a lead from a lead frame;
a solderable pad located on a top horizontal surface of the lead;
a surface mount pad located on a bottom horizontal surface of the lead;
an IC chip attached to the solderable pad with an adhesive or a solder joint;
molding compound covering portions of the IC chip and the lead; and
an organic adhesion layer that covers a portion of the lead, the organic adhesion layer contacting the molding compound but not contacting the IC chip, the organic adhesion layer covering a portion of the bottom horizontal surface of the lead and covering an outer portion of the surface mount pad;
wherein the organic adhesion layer is a photo-imageable polyimide or a photo-imageable epoxy material with a thickness in the range of 1 um to 50 um.

11. The packaged integrated circuit (IC) of claim 10 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead.

12. The packaged integrated circuit (IC) of claim 10 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead and covers an outer portion of the solderable pad.

13. The packaged integrated circuit (IC) of claim 10 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead, and covers a portion of a vertical surface of the lead.

14. The packaged integrated circuit (IC) of claim 10 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead, covers a portion of a vertical surface of the lead, and covers an outer portion of the solderable pad.

15. The packaged integrated circuit (IC) of claim 10 , further including an integrated circuit coupled to the solderable pad with a solder joint wherein a width of the solder joint is defined by a width of an opening in the organic adhesion layer over the solderable pad and wherein a height of the solder joint is greater than a thickness of the organic adhesion layer.

16. The packaged integrated circuit (IC) of claim 10 , further including an integrated circuit coupled to the solderable pad with a solder joint; the lead and integrated circuit encapsulated with molding compound wherein a first surface of the organic adhesion layer adheres to the lead and wherein a second surface of the organic adhesion layer adheres to the molding compound.

17. The packaged integrated circuit (IC) of claim 10 , further including a circuit board surface mount pad on an integrated circuit board coupled to the lead surface mount pad with a solder joint wherein a width of the solder joint is defined by a width of an opening in the organic adhesion layer over a lead surface mount pad and wherein a height of the solder joint is greater than a thickness of the organic adhesion layer.

18. The packaged integrated circuit (IC) of claim 10 , further including covalent bonds between the molding compound and the organic adhesion layer.

19. A packaged integrated circuit (IC), comprising:
a lead from a lead frame;
a wire bond pad located on a top horizontal surface of the lead;
a surface mount pad located on a bottom horizontal surface of the lead;
an IC chip attached to the wire bond pad with a wire bond;
molding compound covering portions of the IC chip, the wire bond, and the lead; and
an organic adhesion layer that covers a portion of the lead, the organic adhesion layer contacting the molding compound but not contacting the IC chip, the organic adhesion layer covering a portion of the bottom horizontal surface of the lead and covering an outer portion of the surface mount pad;
wherein the organic adhesion layer is polyimide or an epoxy material with a thickness in the range of 1 um to 50 um.

20. The packaged integrated circuit (IC) of claim 19 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead and wherein the organic adhesion layer covers an outer portion of the wire bond pad.

21. The packaged integrated circuit (IC) of claim 19 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead, and covers a portion of a vertical surface of the lead.

22. The packaged integrated circuit (IC) of claim 19 , wherein the organic adhesion layer covers a portion of the top horizontal surface of the lead, covers a portion of a vertical surface of the lead, and covers an outer portion of the wire bond pad.

23. The packaged integrated circuit (IC) of claim 19 , further including a circuit board surface mount pad on an integrated circuit board coupled to th

Assignees

• Texas Instruments Inc

Inventors

• Williamson Jaimal Mallory
• Gallegos Bernardo
• Arroyo Jose Carlos

Classifications

• H01L23/49861

  Electricity · mapped topic

• H01L2924/00

  Electricity · mapped topic

• H01L21/4825

  Electricity · mapped topic

• H01L23/49548

  Electricity · mapped topic

• H01L2224/48465

  Electricity · mapped topic