Delta-sigma modulator, electronic device, and method for controlling delta-sigma modulator

Patent metadata

Field	Value
Publication number	US-10659074-B2
Application number	US-201716337201-A
Country	US
Kind code	B2
Filing date	Sep 1, 2017
Priority date	Dec 14, 2016
Publication date	May 19, 2020
Grant date	May 19, 2020

Abstract

To effectively suppress an idle tone in a delta-sigma modulator that generates a feedback signal by a digital-to-analog converter. A filter integrates a difference between an input analog signal and a feedback signal, and outputs the integrated difference as an integrated signal. A preceding-stage quantizer quantizes an integrated signal into a digital signal, and outputs the resulting digital signal as a preceding-stage output signal. An adder adds a predetermined dithering signal to a preceding-stage output signal, and outputs the resulting signal as a subsequent-stage input signal. A subsequent-stage quantizer configured to quantize the subsequent-stage input signal into a digital signal of a shorter number of bits than a preceding-stage output signal, and outputs the resulting digital signal as a subsequent-stage output signal. A digital-to-analog converter configured to convert a subsequent-stage output signal into an analog signal, and outputs the resulting analog signal to a filter as a feedback signal.

First claim

The invention claimed is:

1. A delta-sigma modulator, comprising:
a filter configured to:
integrate a difference between an input analog signal and a feedback signal; and
output the integrated difference as an integrated signal;

a preceding-stage quantizer configured to:
quantize the integrated signal into a first digital signal; and
output the first digital signal as a preceding-stage output signal;

an adder configured to:
add a determined dithering signal to the preceding-stage output signal; and
output a resulting signal based on the addition as a subsequent-stage input signal;

a subsequent-stage quantizer configured to:
re-quantize the subsequent-stage input signal into a second digital signal of a shorter number of bits than the preceding-stage output signal; and
output the second digital signal as a subsequent-stage output signal; and

a digital-to-analog converter configured to:
convert the subsequent-stage output signal into a resulting analog signal; and
output the resulting analog signal to the filter as the feedback signal.

2. The delta-sigma modulator according to claim 1 , further comprising a dithering signal generation circuit configured to:
generate the determined dithering signal; and
supply the generated determined dithering signal to the adder.

3. The delta-sigma modulator according to claim 2 , wherein the dithering signal generation circuit includes:
a linear shift feedback register configured to generate a determined code indicating a random number; and
a logic circuit configured to generate the determined dithering signal from the determined code.

4. The delta-sigma modulator according to claim 2 , wherein the dithering signal generation circuit generates a signal whose expected value is substantially zero as the determined dithering signal.

5. The delta-sigma modulator according to claim 1 , wherein the filter includes:
a subtractor configured to compute the difference between the input analog signal and the feedback signal; and
an integrator configured to:
integrate the difference; and
output the integrated difference as the integrated signal.

6. The delta-sigma modulator according to claim 1 , wherein the re-quantization comprises truncation of a determined digit of the subsequent-stage input signal.

7. An electronic device, comprising:
a filter configured to:
integrate a difference between an input analog signal and a feedback signal; and
output the integrated difference as an integrated signal;

a preceding-stage quantizer configured to:
quantize the integrated signal into a first digital signal; and
output the first digital signal as a preceding-stage output signal;

an adder configured to:
add a determined dithering signal to the preceding-stage output signal; and
output a resulting signal based on the addition as a subsequent-stage input signal;

a subsequent-stage quantizer configured to:
re-quantize the subsequent-stage input signal into a second digital signal of a shorter number of bits than the preceding-stage output signal; and
output the second digital signal as a subsequent-stage output signal;

a digital-to-analog converter configured to:
convert the subsequent-stage output signal into a resulting analog signal; and
output the resulting analog signal to the filter as the feedback signal; and

a digital signal processing unit configured to process the subsequent-stage output signal.

8. A method for controlling a delta-sigma modulator, the method comprising:
integrating a difference between an input analog signal and a feedback signal;
outputting the integrated difference as an integrated signal;
quantizing the integrated signal into a first digital signal;
outputting the first digital signal as a preceding-stage output signal;
adding a determined dithering signal to the preceding-stage output signal;
outputting a resulting signal based on the addition as a subsequent-stage input signal;
re-quantizing the subsequent-stage input signal into a second digital signal of a shorter number of bits than the preceding-stage output signal;
outputting the second digital signal as a subsequent-stage output signal;
converting the subsequent-stage output signal into a resulting analog signal; and
outputting the resulting analog signal as the feedback signal.

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• Nakamoto Eiichi

Classifications

• H03M3/464

  Details of the digital/analogue conversion in the feedback path · CPC title

• H03M3/332 Primary

  in particular a pseudo-random signal · CPC title

• H03M3/416

  all these quantisers being multiple bit quantisers · CPC title

• H04R3/02

  for preventing acoustic reaction {, i.e. acoustic oscillatory feedback (specially adapted for hearing aids H04R25/453)} · CPC title

• H03M3/458

  Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title