Heating system and method for microfluidic and micromechanical applications

Patent metadata

Field	Value
Publication number	US-10654714-B2
Application number	US-201615234312-A
Country	US
Kind code	B2
Filing date	Aug 11, 2016
Priority date	Dec 27, 2007
Publication date	May 19, 2020
Grant date	May 19, 2020

Abstract

An integrated semiconductor heating assembly includes a semiconductor substrate, a chamber formed therein, and an exit port in fluid communication with the chamber, allowing fluid to exit the chamber in response to heating the chamber. The integrated heating assembly includes a first heating element adjacent the chamber, which can generate heat above a selected threshold and bias fluid in the chamber toward the exit port. A second heating element is positioned adjacent the exit port to generate heat above a selected threshold, facilitating movement of the fluid through the exit port away from the chamber. Addition of the second heating element reduces the amount of heat emitted per heating element and minimizes thickness of a heat absorption material toward an open end of the exit port. Since such material is expensive, this reduces the manufacturing cost and retail price of the assembly while improving efficiency and longevity thereof.

First claim

The invention claimed is:

1. A method, comprising:
forming a chamber in a semiconductor substrate having a first surface and a second surface, the chamber extending into the semiconductor substrate from the first surface and having a bottom between the first and the second surfaces of the semiconductor substrate;
forming an inlet path to the chamber through the second surface of the semiconductor substrate, the inlet path configured to receive fluid;
forming an outlet path in fluid communication with the chamber and a surrounding environment;
forming a first heating element between the chamber bottom and the second surface of the semiconductor substrate, the first heating element being configured to generate heat when subjected to an electrical current, the first heating element having an annular shape;
forming a second heating element to include an at least partially annular shape surrounding at least a portion of the outlet path;
positioning the first heating element between the chamber and the semiconductor substrate; and
forming a third heating element adjacent to the outlet path of the chamber, the third heating element having an at least partially annular shape, the third heating element at least partially surrounding the second heating element.

2. The method of claim 1 , further comprising positioning a heat sink member at least partially surrounding the outlet path.

3. A method, comprising:
forming a chamber in a semiconductor substrate having a first surface and a second surface, the chamber extending into the semiconductor substrate from the first surface and having a bottom between the first and the second surfaces of the semiconductor substrate;
forming an inlet path to the chamber through the second surface of the semiconductor substrate, the inlet path configured to receive fluid;
forming an outlet path in fluid communication with the chamber and a surrounding environment; and
forming a first heating element between the chamber bottom and the second surface of the semiconductor substrate, the first heating element being configured to generate heat when subjected to an electrical current, the first heating element having an annular shape.

4. The method of claim 3 , further comprising:
forming a second heating element to include an at least partially annular shape surrounding at least a portion of the outlet path; and
positioning the first heating element between the chamber and the semiconductor substrate.

5. The method of claim 4 , further comprising forming a third heating element adjacent to the outlet path of the chamber.

6. The method of claim 3 , further comprising positioning a heat sink member at least partially surrounding the outlet path.

7. A method, comprising:
forming a recess in a semiconductor substrate, the recess having an interior surface;
forming a first heating element in a first dielectric layer on the interior surface of the recess;
forming a sacrificial layer in the recess, the sacrificial layer having a first surface on the first dielectric layer;
forming a second dielectric layer on a second surface of the sacrificial layer;
forming a second heating element in a third dielectric layer on the second dielectric layer;
forming an inlet path through the semiconductor substrate to expose the first surface of the sacrificial layer;
forming an outlet path through the second and third dielectric layers to expose the second surface of the sacrificial layer, the outlet path adjacent to the second heating element; and
forming a chamber by releasing the sacrificial layer.

8. The method of claim 7 wherein forming the first heating element on the interior surface of the recess includes forming the first heating element adjacent to a bottom surface of the recess.

9. The method of claim 8 , further comprising forming a third heating element adjacent to sidewalls of the recess.

10. The method of claim 7 wherein forming the first heating element on the interior surface of the recess includes forming the first heating element adjacent to sidewalls of the recess.

11. The method of claim 7 , further comprising forming a third heating element adjacent to a bottom surface of the recess.

12. The method of claim 7 , further comprising positioning a heat sink member to at least partially surrounding the outlet path.

13. The method of claim 7 , further comprising:
forming a transistor in the substrate spaced from the recess; and
coupling the transistor to the second heating element.

14. A method, comprising:
forming a recess extending in a semiconductor substrate from a surface, the recess having a bottom surface;
forming a first heating element adjacent to the bottom surface of the recess;
forming a first dielectric layer over the first heating element in the recess;
forming a sacrificial layer on the first dielectric layer in the recess;
forming a second dielectric layer over the first dielectric layer;
forming a chamber by removing the sacrificial layer; and
forming an outlet path extending from the chamber toward an external environment through the second dielectric layer.

15. The method of claim 14 , further comprising forming a second heating element adjacent to the bottom surface of the recess.

16. The method of claim 15 , wherein the second heating element includes an outer perimeter and an inner perimeter, wherein forming a second heating element includes forming the second heating element such that the first heating element is positioned within the inner perimeter of the second heating element.

17. The method of claim 14 , further comprising forming a second heating element on the second dielectric layer, the second heating element surrounding the outlet path.

18. The method of claim 17 , further comprising forming a third heating element on the second dielectric layer, the third heating element surrounding the second heating element.

19. The method of claim 14 , further comprising:
forming a second heating element on the second dielectric layer, the second heating element surrounding the outlet path;
forming a transistor in the substrate spaced from the recess; and
coupling the transistor to the second heating element.

20. The method of claim 14 , further comprising:
forming an inlet path through the substrate to the recess; and
forming a second heating element surrounding the inlet path.

21. The method of claim 20 , further comprising forming a third heating element surrounding the outlet path.

Assignees

• St Microelectronics Inc

Inventors

• Fang Ming
• Wang Fuchao

Classifications

• B41J2/14072

  Electrical connections, e.g. details on electrodes, connecting the chip to the outside... · CPC title

• B81B1/006

  Microdevices formed as a single homogeneous piece, i.e. wherein the mechanical function is obtained by the use of the device, e.g. cutters · CPC title

• B81B2201/058

  Microfluidics not provided for in B81B2201/051 - B81B2201/054 · CPC title

• B41J2/1628

  dry etching · CPC title

• B41J2/1629

  wet etching · CPC title