Semiconductor device manufacturing method including forming a wide portion spreading over a looped portion

US10651121B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10651121-B2
Application numberUS-201916385669-A
CountryUS
Kind codeB2
Filing dateApr 16, 2019
Priority dateFeb 24, 2017
Publication dateMay 12, 2020
Grant dateMay 12, 2020

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A semiconductor device includes a semiconductor chip, an electrode electrically connected to the semiconductor chip, the electrode including a looped portion, a cylindrical electrode including a main portion having a screw thread formed therein and a narrow portion continuous with the main portion, the narrow portion having a smaller width than the main portion, the cylindrical electrode being electrically connected to the electrode by the narrow portion being inserted into the looped portion, and a case for the semiconductor chip and the electrode, the case contacting the main portion while causing the screw thread and a connecting portion between the looped portion and the cylindrical electrode to be exposed.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device manufacturing method, comprising: a first preparation of placing a cylindrical electrode including a main portion and a narrow portion continuous with the main portion on a lower mold half, the narrow portion having a smaller width than the main portion, to cause the main portion to contact the lower mold half; a second preparation of placing an electrode including a looped portion on the lower mold half to house part of the narrow portion in the looped portion and to cause the narrow portion to protrude from the looped portion upward; a mold clamping of clamping an upper mold half and the lower mold half together to compress with the upper mold half a portion of the narrow portion which protrudes from the looped portion upward, thus forming a wide portion spreading over the looped portion; and a resin injection of injecting resin into a cavity surrounded by the upper mold half and the lower mold half to cause the resin to contact a side surface of the main portion. 2. The semiconductor device manufacturing method according to claim 1 , wherein the upper mold half has a swaging pin, and, in the mold clamping, a portion of the narrow portion which protrudes from the looped portion upward is compressed with the swaging pin to form the wide portion. 3. The semiconductor device manufacturing method according to claim 2 , wherein the narrow portion has a countersink portion formed in a portion thereof which contacts the swaging pin in the mold clamping. 4. The semiconductor device manufacturing method according to claim 1 , wherein after the resin injection is finished, the wide portion is exposed from the resin.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • utilising a spring, clip, or other resilient member (H01R4/52 takes precedence) · CPC title

  • one conductor screwing into another · CPC title

  • Conductive members located parallel to axis of screw · CPC title

  • Riveted connections (by explosion H01R4/08) · CPC title

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10651121B2 cover?
A semiconductor device includes a semiconductor chip, an electrode electrically connected to the semiconductor chip, the electrode including a looped portion, a cylindrical electrode including a main portion having a screw thread formed therein and a narrow portion continuous with the main portion, the narrow portion having a smaller width than the main portion, the cylindrical electrode being …
Who is the assignee on this patent?
Mitsubishi Electric Corp
What technology area does this patent fall under?
Primary CPC classification H01L23/50. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 12 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).