Micro-electro-mechanical device with a movable structure, in particular micromirror, and manufacturing process thereof

US10649202B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10649202-B2
Application numberUS-201816225881-A
CountryUS
Kind codeB2
Filing dateDec 19, 2018
Priority dateDec 28, 2016
Publication dateMay 12, 2020
Grant dateMay 12, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A micro-electro-mechanical (MEMS) device is formed in a first wafer overlying and bonded to a second wafer. The first wafer includes a fixed part, a movable part, and elastic elements that elastically couple the movable part and the fixed part. The movable part further carries actuation elements configured to control a relative movement, such as a rotation, of the movable part with respect to the fixed part. The second wafer is bonded to the first wafer through projections extending from the first wafer. The projections may, for example, be formed by selectively removing part of a semiconductor layer. A composite wafer formed by the first and second wafers is cut to form many MEMS devices.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method, comprising: forming a first structural wafer from a layer stack having a silicon on insulator structure; selectively removing portions of the first structural wafer to produce projections; bonding the projections of the first structural wafer to a second structural wafer; forming actuation elements associated with the first structural wafer; and processing the first structural wafer to form a fixed part, a movable part, and elastic elements, the movable part carrying the actuation elements and having the projections extending therefrom, and the elastic elements coupling the movable part to the fixed part. 2. The method of claim 1 , wherein the forming of the first structural wafer comprises: forming a layer stack comprised of a first semiconductor layer, an insulating layer stacked on the first semiconductor layer, and a second semiconductor layer stacked on the insulating layer, with an oxide layer on a surface of the first semiconductor layer opposite the insulating layer; forming sensing structures in the second semiconductor layer; and depositing a premetal dielectric layer on the sensing structures and the second semiconductor layer. 3. The method of claim 2 , wherein the forming of the sensing structures comprises forming piezoresistors, piezoresistor contact regions contiguous to the piezoresistors, and substrate contact regions. 4. The method of claim 3 , wherein the forming of the first structural wafer further comprises selectively removing the premetal dielectric layer over the piezoresistor contact regions and the substrate contact regions to form first and second openings. 5. The method of claim 4 , wherein the forming of the first structural wafer further comprises: depositing a metal layer and defining the metal layer to form resistor contacts in the first openings and in direct electrical contact with the piezoresistor contact regions, and to form substrate contacts in the second openings and in direct electrical contact with the substrate contact regions; depositing an intermetal dielectric layer on the metal layer; selectively etching the intermetal dielectric layer above the substrate contacts to form third openings; and selectively etching the intermetal dielectric layer and the premetal dielectric layer to form structure definition vias and separation vias. 6. The method of claim 2 , wherein the forming of the first structural wafer further comprises: forming the actuation elements as piezoelectric actuation elements on the premetal dielectric layer; forming a protection structure for the piezoelectric actuation elements; and forming the projections as mirror supporting regions. 7. The method of claim 6 , wherein forming the piezoelectric actuation elements on the premetal dielectric layer comprises: depositing a bottom electrode layer on the premetal dielectric layer; depositing a piezoelectric layer on the bottom electric layer; depositing a top electrode layer on the piezoelectric layer; etching the top electrode layer and the piezoelectric layer to form top electrodes and piezoelectric regions; and etching the bottom electrode layer to form bottom electrodes. 8. The method of claim 7 , wherein forming a protection structure for the piezoelectric actuation elements comprises: depositing a passivation layer on the piezoelectric actuation elements; masking and etching the passivation layer to form electrode vias reaching the top and bottom electrodes of the piezoelectric actuation elements; forming contact vias in the passivation layer extending between some of the sensing structures; forming structure definition vias and separation vias in the passivation layer extending to the second semiconductor layer; and depositing and lithographically etching a metal layer to form actuator contacts in the electrode vias and the contact vias, and to form interconnections and contact pads on a surface of the passivation layer. 9. The method of claim 8 , wherein forming the mirror supporting regions comprises thinning and patterning the first semiconductor layer. 10. The method of claim 9 , wherein thinning and patterning the first semiconductor layer comprises: bonding a first supporting wafer to the passivation layer through a first temporary bonding layer; and thinning, polishing, and selectively removing portions of the first semiconductor layer together with corresponding portions of the insulating layer to form the mirror supporting regions. 11. The method of claim 10 , wherein the thinning, polishing, and selectively removing of portions of the first semiconductor layer together with the corresponding portions of the insulating layer results in the layer stack having an overall thickness of 100 μm to 150 μm. 12. The method of claim 10 , wherein the second structural wafer is formed to have reflecting regions on a first surface of a substrate; and further comprising: forming a protective coating layer on the reflecting regions and the first surface of the substrate; bonding a second supporting wafer on the second structural wafer using a second temporary bonding layer; thinning the substrate and printing adhesive regions on a second surface of the substrate; bonding the first structural wafer to the second structural wafer using the adhesive regions on the second surface of the substrate of the second structural wafer, with the adhesive regions being aligned with the mirror supporting regions of the first structural wafer; removing the first supporting wafer; removing the second semiconductor layer of the layer stack of the first structural wafer under the structure definition vias and under the separations vias to thereby create the movable part surrounded by the fixed part; and removing the second supporting wafer at a higher temperature than used to remove the first supporting wafer. 13. The method of claim 2 , wherein the sensing structures are selected from a group comprising piezoresistors, piezoresistor contact regions, and substrate contact regions. 14. The method of claim 1 , wherein the layer stack has an overall thickness of 100 to 150 μm. 15. An electronic device, comprising: a mirror driving apparatus comprising: a first body; and a second body overlying the first body and carrying a reflective surface; wherein the first body comprises a fixed part, a movable part, and elastic elements coupling the movable part and the fixed part, said movable part carrying actuation elements configured to control a movement of the movable part with respect to the fixed part; and wherein the first body includes projections that extend from the movable part and are bonded to the second body. 16. The electronic device of claim 15 , wherein the elastic elements are torsion bars. 17. The electronic device of claim 15 , wherein the actuation elements comprise electrostatic actuation elements implemented as mobile electrodes capacitively coupled to fixed electrodes. 18. The electronic device of claim 15 , wherein the actuation elements comprise magnetic actuation elements, the magnetic actuation elements comprising coils configured to be coupled to an external magnetic structure. 19. The electronic device of claim 15 , wherein the actuation elements comprise piezoelectric regions that cause controlled deformation of the movable part when supplied with a current. 20. The electronic device of claim 15 , further comprising: an interface receiving image data; a laser source driver generating laser drive signals base

Assignees

Inventors

Classifications

  • B81B7/02Primary

    containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title

  • Treatment for improving the physical properties not provided for in groups B81C1/0065 - B81C1/00706 · CPC title

  • Micromirrors, not used as optical switches · CPC title

  • Gluing · CPC title

  • Anchors · CPC title

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What does patent US10649202B2 cover?
A micro-electro-mechanical (MEMS) device is formed in a first wafer overlying and bonded to a second wafer. The first wafer includes a fixed part, a movable part, and elastic elements that elastically couple the movable part and the fixed part. The movable part further carries actuation elements configured to control a relative movement, such as a rotation, of the movable part with respect to t…
Who is the assignee on this patent?
St Microelectronics Srl
What technology area does this patent fall under?
Primary CPC classification B81B7/02. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue May 12 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).