Encapsulated microbattery having terminal connected to active layer through a via

Patent metadata

Field	Value
Publication number	US-10637013-B2
Application number	US-201816031098-A
Country	US
Kind code	B2
Filing date	Jul 10, 2018
Priority date	Sep 8, 2016
Publication date	Apr 28, 2020
Grant date	Apr 28, 2020

Abstract

Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.

First claim

The invention claimed is:

1. A method, comprising:
forming a first battery structure by:
disposing an active layer stack having at least one electrode area on a substrate;
encapsulating the active layer stack with a cover having a surface area greater than that of the active layer stack;
forming at least one conductive via extending through the cover to electrically couple to the at least one electrode area of the active layer stack; and
forming a conductive pad layer on the cover and electrically coupled to the at least one conductive via.

2. The method of claim 1 , wherein encapsulating the active layer stack with the cover comprises applying a pre-formed cover stack to the active layer stack using a roller; and wherein the pre-formed cover stack comprises a first adhesive layer to be disposed on the active layer stack, a metal layer on the first adhesive layer, a second adhesive layer on the metal layer, and an insulating layer on the second adhesive layer.

3. The method of claim 1 , wherein forming the conductive pad layer on the cover comprises applying a conductive glue to the cover adjacent the at least one conductive via, and attaching the conductive pad layer to the cover by positioning the conductive pad layer to contact the conductive glue.

4. The method of claim 1 , wherein forming the at least one conductive via comprises forming a plurality of conductive microvias extending through the cover to electrically couple to the at least one electrode area of the active layer stack.

5. The method of claim 4 , wherein forming the plurality of microvias comprises:
forming a plurality of passageways extending through the cover to contact the at least one electrode area of the active layer stack;
forming an outer insulating layer within the plurality of passageways; and
forming an inner conductive layer within the outer insulating layer.

6. The method of claim 4 , wherein forming the plurality of microvias comprises:
laser drilling a plurality of passageways having a diameter of less than 200 μm extending through the cover to contact the at least one electrode area of the active layer stack;
forming an outer insulating layer within the plurality of passageways; and
forming an inner conductive layer within the outer insulating layer.

7. The method of claim 1 , further comprising disposing an interstack insulating layer on the battery structure; and further comprising:
placing a further substrate on the first battery structure; and
forming at least one interstack conductive via extending through the further substrate of the second battery structure to electrically couple to the conductive pad layer of the first battery structure.

8. The method of claim 7 , further comprising forming a second battery structure over the first battery structure by:
disposing a further active layer stack having at least one further electrode area on the further substrate and electrically coupled to the at least one interstack conductive via;
encapsulating the further active layer stack with a further cover having a surface area greater than that of the further active layer stack;
forming at least one further conductive via extending through the further cover to electrically couple to the at least one further electrode area; and
forming a further conductive pad layer on the further cover of the second battery structure and electrically coupled to the at least one further conductive via.

9. The method of claim 8 , wherein encapsulating the further active layer stack with the further cover comprises applying a pre-formed cover stack to the further active layer stack using a roller, wherein the pre-formed cover stack comprises a first adhesive layer to be disposed on the further active layer stack, a metal layer on that first adhesive layer, a second adhesive layer on that metal layer, and an insulating layer on that second adhesive layer.

10. The method of claim 8 , wherein forming the further conductive pad layer on the further cover comprises applying a conductive glue to the further cover adjacent the at least one further conductive via, and attaching the further conductive pad layer to that further cover by positioning the further conductive pad layer to contact the conductive glue.

11. The method of claim 8 , wherein forming the at least further one conductive via comprises forming a plurality conductive microvias extending through the cover of the further additional battery structure to electrically couple to the at least one further electrode area of the further active layer stack.

12. The method of claim 11 , wherein forming the plurality of conductive microvias comprises:
laser drilling a plurality of passageways having a diameter of less than 200 μm extending through the further cover to contact the at least one further electrode area of the further active layer stack;
forming an outer insulating layer within the plurality of passageways; and
forming an inner conductive layer within the outer insulating layer.

13. The method of claim 1 , further comprising:
disposing an interstack insulating layer on the first battery structure;
placing a further substrate on the interstack insulating layer; and
forming at least one interstack conductive via extending through the further substrate.

14. The method of claim 13 , further comprising forming a second battery structure over the first battery structure by:
disposing a further active layer stack having at least one further electrode area on the further substrate and electrically coupled to the at least one interstack conductive via;
encapsulating the further active layer stack with a further cover having a surface area greater than that of the further active layer stack;
forming at least one further conductive via extending through the further cover to electrically couple to the at least one further electrode area; and
forming a further conductive pad layer on the further cover of the second battery structure and electrically coupled to the at least one further conductive via.

15. The method of claim 14 , wherein encapsulating the further active layer stack with the further cover comprises applying a pre-formed cover stack to the further active layer stack using a roller, wherein the pre-formed cover stack comprises a first adhesive layer to be disposed on the further active layer stack, a metal layer on that first adhesive layer, a second adhesive layer on that metal layer, and an insulating layer on that second adhesive layer.

16. The method of claim 14 , wherein forming the further conductive pad layer on the further cover comprises applying a conductive glue to the further cover adjacent the at least one further conductive via, and attaching the further conductive pad layer to that further cover by positioning the further conductive pad layer to contact the conductive glue.

17. The method of claim 14 , wherein forming the at least further one conductive via comprises forming a plurality conductive microvias extending through the cover of the further additional battery structure to electrically couple to the at least one further electrode area of the further active layer stack.

18. The method of claim 17 , wherein forming the plurality of conductive microvias comprises:
laser drilling a plurality of passageways having a diameter of less than 200 μm extending through the further cover to contact the at least one further electrode area of the further active layer stack;
forming an outer insulating layer within the plurality of passageways; and
forming an inner conductive layer within the

Assignees

• St Microelectronics Tours Sas

Inventors

• Fallourd Ludovic

Classifications

• H01M2220/30

  Batteries in portable systems, e.g. mobile phone, laptop · CPC title

• H01M10/044 Primary

  with bipolar electrodes · CPC title

• H01M2/06 Primary

  Electricity · mapped topic

• H01M2/0408

  Electricity · mapped topic

• H01M10/0436 Primary

  Small-sized flat cells or batteries for portable equipment · CPC title