Micro-electro-mechanical device and manufacturing process thereof

US10626008B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10626008-B2
Application numberUS-201816207035-A
CountryUS
Kind codeB2
Filing dateNov 30, 2018
Priority dateNov 19, 2015
Publication dateApr 21, 2020
Grant dateApr 21, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A micro-electro-mechanical device formed in a monolithic body of semiconductor material accommodating a first buried cavity; a sensitive region above the first buried cavity; and a second buried cavity extending in the sensitive region. A decoupling trench extends from a first face of the monolithic body as far as the first buried cavity and laterally surrounds the second buried cavity. The decoupling trench separates the sensitive region from a peripheral portion of the monolithic body.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method, comprising: forming a first buried cavity in a monolithic body of semiconductor material; and forming a sensitive region in the monolithic body facing the first buried cavity, wherein forming the sensitive region includes forming a single trench that extends into the monolithic body as far as the first buried cavity, the single trench extending around the sensitive regions so that a first end of the single trench overlaps a second end of the single trench. 2. The method of claim 1 , further comprising forming a second buried cavity in the sensitive region, the second buried cavity overlapping the first buried cavity. 3. The method of claim 1 , further comprising coupling a perimeter of a membrane to the sensitive region, the membrane being arranged over the sensitive region. 4. The method of claim 3 , wherein the membrane is spaced apart from the sensitive region by a cavity. 5. The method of claim 1 , further comprising coupling a cap element to a surface of the peripheral portion of the monolithic body. 6. The method of claim 1 , wherein the single trench has a spiral shape that extends around an entire perimeter of the sensitive region. 7. The method of claim 6 , wherein the single trench has a first end portion and a second end portion, the first end portion and the second end portion extending along a same side of the sensitive region. 8. A method, comprising: forming a buried cavity in a monolithic body of semiconductor material; forming a sensitive region in the monolithic body of semiconductor material covering the buried cavity; and forming a movable element including a central portion and a perimeter portion, the perimeter portion coupled to the sensitive region, the central portion of the movable element being separated from the sensitive region by a second cavity. 9. The method of claim 8 , wherein forming the sensitive region includes forming a decoupling trench that separates the sensitive region from a peripheral portion of the monolithic body. 10. The method of claim 9 , wherein the decoupling trench has a spiral shape. 11. The method of claim 10 , wherein the spiral shape extends around an entire perimeter of the sensitive region. 12. The method of claim 8 , further comprising coupling a cap to the perimeter portion of the monolithic body, the cap forming a cavity with the monolithic body, the movable element being located in the cavity. 13. The method of claim 8 , further comprising forming a through opening in the monolithic body, the through opening placing the buried cavity in fluid communication with an environment that is external to the monolithic body. 14. A method, comprising: forming a first buried cavity in a monolithic body of semiconductor material; and decoupling a sensitive region in the monolithic body from a peripheral portion of the monolithic body by forming a single spiral shaped trench that extends around an entire perimeter of the sensitive region, the sensitive region facing the first buried cavity. 15. The method of claim 14 , further comprising forming a second buried cavity in the sensitive region. 16. The method of claim 15 , wherein the second buried cavity overlaps the first buried cavity. 17. The method of claim 14 , further comprising coupling a membrane to the sensitive region. 18. The method of claim 17 , wherein the membrane is arranged over the sensitive region and is spaced apart from the sensitive region. 19. The method of claim 18 , further comprising coupling a cap to a surface of the peripheral portion. 20. The method of claim 14 , wherein the single spiral shaped trench is a square spiral shape.

Assignees

Inventors

Classifications

  • Inertial sensors not provided for in B81B2201/0235 - B81B2201/0242 · CPC title

  • B81B7/02Primary

    containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title

  • Cavities · CPC title

  • Inertial sensors · CPC title

  • for reducing stress inside of the package structure · CPC title

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Frequently asked questions

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What does patent US10626008B2 cover?
A micro-electro-mechanical device formed in a monolithic body of semiconductor material accommodating a first buried cavity; a sensitive region above the first buried cavity; and a second buried cavity extending in the sensitive region. A decoupling trench extends from a first face of the monolithic body as far as the first buried cavity and laterally surrounds the second buried cavity. The dec…
Who is the assignee on this patent?
St Microelectronics Srl
What technology area does this patent fall under?
Primary CPC classification B81B7/02. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Apr 21 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).