Integrated circuit package

Patent metadata

Field	Value
Publication number	US-10615134-B2
Application number	US-201815871440-A
Country	US
Kind code	B2
Filing date	Jan 15, 2018
Priority date	Feb 15, 2017
Publication date	Apr 7, 2020
Grant date	Apr 7, 2020

Abstract

An integrated circuit package is described comprising an integrated circuit die and an antenna structure coupled to the integrated circuit die and comprising a stacked arrangement of metal and dielectric layers, wherein a first metal layer includes a planar antenna and at least one further metal layer comprises an artificial dielectric layer. The integrated circuit package may improve the directionality of the antenna and reduces the sensitivity of the antenna to the printed circuit board on which the integrated circuit package is mounted.

First claim

The invention claimed is:

1. An integrated circuit package comprising:
an integrated circuit die;
an antenna structure coupled to the integrated circuit die and comprising a stacked arrangement of:
a first metal layer configured to act as a first artificial dielectric layer (ADL),
a second metal layer configured to act as a second artificial dielectric layer (ADL), wherein a first dielectric layer separates the first metal layer from the second metal layer and the first ADL and the second ADL are misaligned by design to increase effective permittivity, and
a third metal layer configured to act as a planar antenna, wherein a second dielectric layer separates the second metal layer from the third metal layer.

2. The integrated circuit package of claim 1 , wherein the planar antenna comprises at least two slots.

3. The integrated circuit package of claim 1 , further comprising:
an array of four planar antennas.

4. The integrated circuit package of claim 1 , wherein the antenna structure comprises a multi-layer printed circuit board (PCB).

5. The integrated circuit package of claim 1 , wherein the antenna structure and the integrated circuit die are vertically stacked.

6. The integrated circuit package of claim 1 , wherein the integrated circuit die is a monolithic microwave integrated circuit (MMIC).

7. The integrated circuit package of claim 1 , further comprising:
a first redistribution layer including a redistribution metal layer, wherein the integrated circuit is electrically connected to the antenna structure via the first redistribution metal layer.

8. The integrated circuit package of claim 7 , wherein the redistribution metal layer forms part of the antenna structure.

9. An embedded wafer level ball grid array package comprising the integrated circuit package of claim 7 .

10. A radar device for an automotive vehicle, the radar device comprising the integrated circuit package of claim 7 .

11. The integrated circuit package of claim 1 , further comprising:
a front-side redistribution layer; and
a back-side redistribution layer.

12. The integrated circuit package of claim 1 , wherein the third metal layer includes an array of four planar dual-slot antennas.

Assignees

• Nxp Bv

Inventors

• Spella Maristella
• Syed Waqas Hassan
• Cavallo Daniele
• Huang Mingda
• Van Gemert Leo

Classifications

• H01Q13/16

  Folded slot antennas · CPC title

• H01Q19/09

  wherein the primary active element is coated with or embedded in a dielectric or magnetic material (protective material H01Q1/40, varying the electric or magnetic characteristics of refracting or diffracting devices H01Q3/44) · CPC title

• H01Q19/28

  using a secondary device in the form of two or more substantially straight conductive elements (log- periodic antennas H01Q11/10; constituting a reflecting surface H01Q19/10) · CPC title

• H01Q21/064

  using horn or slot aerials (slotted waveguides arrays H01Q21/005) · CPC title

• H01Q1/2283

  mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package · CPC title