Method for predicting thickness of oxide layer of silicon wafer

Patent metadata

Field	Value
Publication number	US-10615085-B2
Application number	US-201816172947-A
Country	US
Kind code	B2
Filing date	Oct 29, 2018
Priority date	Oct 31, 2017
Publication date	Apr 7, 2020
Grant date	Apr 7, 2020

Abstract

An embodiment provides a method of predicting a thickness of an oxide layer of a silicon wafer including: aging a heat treatment furnace (furnace); measuring a thickness of each of the oxide layers after disposing a plurality of reference wafers in slots of a heat treatment boat in the furnace and forming oxide layers; and measuring a thickness of each of the oxide layers after disposing the plurality of reference wafers and test wafers in the slots of the heat treatment boat in the furnace and forming oxide layers.

First claim

What is claimed is:

1. A method of predicting a thickness of an oxide layer of a silicon wafer, the method comprising:
aging a heat treatment furnace;
measuring a thickness of each of a plurality of oxide layers after disposing a plurality of reference wafers in slots of a heat treatment boat in the furnace and forming the oxide layers; and
measuring a thickness of each of the oxide layers after disposing the plurality of reference wafers and a plurality of test wafers in the slots of the heat treatment boat in the furnace and forming the oxide layers,
wherein the plurality of test wafers include a first group and a second group that are different from each other in pretreatment before the forming of the oxide layers.

2. The method of claim 1 , wherein the test wafers of the first group and the second group have different haze numbers or surface roughness.

3. The method of claim 1 , wherein the aging of the furnace includes providing dummy wafers in upper and lower slots among the slots of the heat treatment boat in the furnace.

4. The method of claim 1 , wherein different ones of the plurality of reference wafers are alternately disposed with different ones of the plurality of the test wafers in the slots of the heat treatment boat in the furnace to form the oxide layers.

5. The method of claim 1 , wherein the disposing of the plurality of reference wafers and the plurality of test wafers in the slots of the heat treatment boat in the furnace and the forming the oxide layers is performed at least twice.

6. The method of claim 1 , wherein the plurality of test wafers are fabricated with different cleaning conditions.

7. The method of claim 1 , wherein the plurality of test wafers are dipped in a cleaning solution and cleaned.

8. The method of claim 1 , wherein surface roughness of each of the test wafers is 0.2 Å or less.

9. The method of claim 1 , wherein the measuring of the thickness of the oxide layer is performed at five different points of the wafer within two hours after the forming of the oxide layers.

10. A method of predicting a thickness of an oxide layer of a silicon wafer, the method comprising:
aging a heat treatment furnace; and
measuring a thickness of each of a plurality of oxide layers after disposing a plurality of reference wafers and a plurality of test wafers in slots of a heat treatment boat in the furnace and forming the oxide layer,
wherein the plurality of test wafers are fabricated with different cleaning conditions, and the plurality of test wafers are dipped in a cleaning solution and cleaned.

11. The method of claim 10 , wherein the plurality of test wafers include a first group and a second group that are different from each other in pretreatment before the forming of the oxide layers, and the test wafers of the first group and the second group have different haze numbers or surface roughness.

12. The method of claim 10 , wherein the aging of the furnace includes providing dummy wafers in upper and lower slots among the slots of the heat treatment boat in the furnace.

13. The method of claim 10 , wherein different ones of the plurality of reference wafers are alternately disposed with different ones of the plurality of test wafers in the slots of the heat treatment boat in the furnace to form the oxide layers.

14. The method of claim 10 , wherein surface roughness of each of the test wafers is 0.2 Å or less, and the measuring of the thickness of the oxide layer is performed at five different points of the wafer within two hours after the forming of the oxide layers.

15. A method of predicting a thickness of an oxide layer of a silicon wafer, the method comprising:
aging a heat treatment furnace;
measuring a thickness of each of a plurality of oxide layers after disposing a plurality of reference wafers in slots of a heat treatment boat in the furnace and forming the oxide layers; and
measuring a thickness of each of the oxide layers after disposing the plurality of reference wafers and a plurality of test wafers in the slots of the heat treatment boat in the furnace and forming the oxide layers,
wherein the disposing of the plurality of reference wafers and the plurality of test wafers in the slots of the heat treatment boat in the furnace and the forming of the oxide layers is performed at least twice.

16. The method of claim 15 , wherein the plurality of test wafers include a first group and a second group, wherein the test wafers of the first group and the second group have different haze numbers or surface roughness.

17. The method of claim 15 , wherein the aging of the furnace includes providing dummy wafers in upper and lower slots among the slots of the heat treatment boat in the furnace.

18. The method of claim 15 , wherein different ones of the plurality of reference wafers are alternately disposed with different ones of the plurality of the test wafers in the slots of the heat treatment boat in the furnace to form the oxide layers.

Assignees

• Sk Siltron Co Ltd

Inventors

• Park Jung Kil
• Jung Sung Woo
• Kim Ja Young

Classifications

• H10P74/23

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• H10P72/0432

  mainly by conduction · CPC title

• H10P74/203 Primary

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• G01B21/085

  using thermal means · CPC title

• H01L21/67103

  Electricity · mapped topic