Nontransactional store instruction

Patent metadata

Field	Value
Publication number	US-10599435-B2
Application number	US-201614993370-A
Country	US
Kind code	B2
Filing date	Jan 12, 2016
Priority date	Jun 15, 2012
Publication date	Mar 24, 2020
Grant date	Mar 24, 2020

Abstract

A NONTRANSACTIONAL STORE instruction, executed in transactional execution mode, performs stores that are retained, even if a transaction associated with the instruction aborts. The stores include user-specified information that may facilitate debugging of an aborted transaction.

First claim

What is claimed is:

1. A computer program product for executing an instruction within a computing environment, said computer program product comprising:
a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising:
an operation code to specify a nontransactional store operation;
a first operand; and
a second operand to designate a location for the first operand; and

executing, by the processor, the machine instruction, the executing comprising:
nontransactionally placing the first operand at the location specified by the second operand, wherein information stored at the second operand is retained despite an abort of a transaction associated with the machine instruction, and wherein the nontransactionally placing is delayed until an end of transactional execution mode of the processor.

2. The computer program product of claim 1 , wherein the end of transactional execution mode results from an end of an outermost transaction associated with the machine instruction or an abort condition.

3. The computer program product of claim 1 , wherein multiple nontransactional stores appear as concurrent stores to other processors.

4. The computer program product of claim 1 , wherein the method further comprises:
determining whether the processor is in transactional execution mode;
based on the processor being in the transactional execution mode, determining whether the transaction is a constrained transaction or a nonconstrained transaction; and
based on the transaction being a nonconstrained transaction, continuing execution of the machine instruction.

5. The computer program product of claim 4 , wherein based on the transaction being a constrained transaction, providing a program exception and terminating execution of the machine instruction.

6. The computer program product of claim 4 , wherein based on the processor not being in transactional execution mode, executing the machine instruction as a store instruction.

7. The computer program product of claim 1 , wherein the second operand is formed from a combination of contents of a register specified by an index field of the machine instruction, contents of a register specified by a base field of the machine instruction, and contents of at least one displacement field.

8. The computer program product of claim 1 , wherein the machine instruction comprises a nontransactional store instruction, and wherein the method further comprises:
initiating the transaction based on execution of a transaction begin instruction, the transaction effectively delaying committing transactional stores to main memory until completion of a selected transaction;
committing the transactional stores to main memory based on executing a transaction end instruction that completes execution of the selected transaction;
discarding the transactional stores based on an abort that ends execution of the selected transaction; and
wherein the nontransactionally placing is performed independent of the committing or the discarding.

9. The computer program product of claim 1 , wherein the first operand comprises contents of a register specified by the machine instruction, the contents being user-specified.

10. The computer program product of claim 1 , wherein the transaction is a nonconstrained transaction in a nesting of nonconstrained transactions.

11. A computer system for executing an instruction within a computing environment, said computer system comprising:
a memory; and
a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising:
obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising:
an operation code to specify a nontransactional store operation;
a first operand; and
a second operand to designate a location for the first operand; and

executing, by the processor, the machine instruction, the executing comprising:
nontransactionally placing the first operand at the location specified by the second operand, wherein information stored at the second operand is retained despite an abort of a transaction associated with the machine instruction, and wherein the nontransactionally placing is delayed until an end of transactional execution mode of the processor.

12. The computer system of claim 11 , wherein multiple nontransactional stores appear as concurrent stores to other processors.

13. The computer system of claim 11 , wherein the method further comprises:
determining whether the processor is in transactional execution mode;
based on the processor being in the transactional execution mode, determining whether the transaction is a constrained transaction or a nonconstrained transaction; and
based on the transaction being a nonconstrained transaction, continuing execution of the machine instruction.

14. The computer system of claim 13 , wherein based on the transaction being a constrained transaction, providing a program exception and terminating execution of the machine instruction.

15. The computer system of claim 13 , wherein based on the processor not being in transactional execution mode, executing the machine instruction as a store instruction.

16. The computer system of claim 11 , wherein the first operand comprises contents of a register specified by the machine instruction, the contents being user-specified.

17. The computer system of claim 11 , wherein the transaction is a nonconstrained transaction in a nesting of nonconstrained transactions.

18. The computer system of claim 11 , wherein the end of transactional execution mode results from an end of an outermost transaction associated with the machine instruction or an abort condition.

19. The computer system of claim 11 , wherein the machine instruction comprises a nontransactional store instruction, and wherein the method further comprises:
initiating the transaction based on execution of a transaction begin instruction, the transaction effectively delaying committing transactional stores to main memory until completion of a selected transaction;
committing the transactional stores to main memory based on executing a transaction end instruction that completes execution of the selected transaction;
discarding the transactional stores based on an abort that ends execution of the selected transaction; and
wherein the nontransactionally placing is performed independent of the committing or the discarding.

20. The computer system of claim 11 , wherein the second operand is formed from a combination of contents of a register specified by an index field of the machine instruction, contents of a register specified by a base field of the machine instruction, and contents of at least one displacement field.

Assignees

• IBM

Inventors

• Greiner Dan F
• Jacobi Christian
• Slegel Timothy J

Classifications

• G06F9/30189

  according to execution mode, e.g. mode flag · CPC title

• G06F9/30087

  Synchronisation or serialisation instructions · CPC title

• G06F9/3836

  Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution · CPC title

• G06F9/3004

  to perform operations on memory · CPC title

• G06F9/466

  Transaction processing · CPC title