Devices and techniques for integrated optical data communication

US10587344B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10587344-B2
Application numberUS-201816150965-A
CountryUS
Kind codeB2
Filing dateOct 3, 2018
Priority dateOct 19, 2012
Publication dateMar 10, 2020
Grant dateMar 10, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Devices and techniques for integrated optical data communication. A method of encoding symbols in an optical signal may include encoding a first symbol by injecting charge carriers, at a first rate, into a semiconductor device, such as a PIN diode. The method may also include encoding a second symbol by injecting charge carriers, at a second rate, into the semiconductor device. The first rate may exceed the second rate. A modulator driver circuit may include a resistive circuit coupled between supply terminal and drive terminals. The modulator driver circuit may also include a control circuit coupled between a data terminal and the resistive circuit. The control circuit may modulate a resistance of the resistive circuit by selectively coupling one or more of a plurality of portions of the resistive circuit to the drive terminal based on data to be optically encoded. In some embodiments, a modulator driver circuit and an optical modulator may be integrated on the same die or stacked (3D integrated) die and connected with through-oxide or through-silicon vias.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit for controlling an optical modulator, the optical modulator configured to encode data in an optical signal carried by an optical waveguide, the optical modulator including a semiconductor device, an optical property of the optical waveguide depending on a concentration of charge carriers in a portion of a semiconductor device, the integrated circuit comprising: a modulator driver circuit including: a data terminal for receiving data to be optically encoded; a supply terminal for coupling to one or more supplies; a drive terminal for coupling to the optical modulator; a resistive circuit coupled between the supply terminal and the drive terminal, the resistive circuit including a plurality of portions; and a control circuit coupled between the data terminal and the resistive circuit, the control circuit being configured to modulate a resistance of the resistive circuit by selectively coupling one or more of the plurality of portions of the resistive circuit to the drive terminal based on the data to be optically encoded, wherein the control circuit includes one or more pulse generator circuits configured to generate pulse signals in response to the data to be optically encoded. 2. The integrated circuit of claim 1 , wherein: a first portion of the control circuit is coupled to a first of the plurality of portions of the resistive circuit, and a second portion of the control circuit is coupled to a second of the plurality of portions of the resistive circuit; and the first portion of the resistive circuit is configured to provide a voltage of a first polarity across the drive terminal, and the second portion of the resistive circuit is configured to provide a voltage of a second polarity across the drive terminal, the first and second polarities being opposite polarities. 3. The integrated circuit of claim 2 , wherein: the first portion of the resistive circuit includes: two or more sub-circuits coupled in parallel, and a configuration terminal for receiving a configuration signal; and the modulator driver circuit is configured to modulate a resistance of the first portion of the resistive circuit by selectively coupling one or more of the two or more sub-circuits between the drive terminal and a first of the one or more supplies based on the configuration signal. 4. The integrated circuit of claim 1 , wherein the control circuit include a differential cascode voltage switch (DCVS) circuit. 5. The integrated circuit of claim 1 , wherein the one or more supplies include an input/output power supply and a core logic power supply. 6. The integrated circuit of claim 1 , wherein: the semiconductor device is a PIN diode, and the portion of the semiconductor device is an intrinsic region of the PIN diode. 7. The integrated circuit of claim 1 , wherein the integrated circuit is a monolithic integrated circuit fabricated in a standard CMOS process. 8. An integrated circuit for controlling an optical modulator, the optical modulator configured to encode data in an optical signal carried by an optical waveguide, the optical modulator including a semiconductor device, an optical property of the optical waveguide depending on a concentration of charge carriers in a portion of a semiconductor device, the integrated circuit comprising: a modulator driver circuit including: a data terminal for receiving data to be optically encoded; a supply terminal for coupling to one or more supplies; a drive terminal for coupling to the optical modulator; a resistive circuit coupled between the supply terminal and the drive terminal, the resistive circuit including a plurality of portions; and a control circuit coupled between the data terminal and the resistive circuit, the control circuit being configured to modulate a resistance of the resistive circuit by selectively coupling one or more of the plurality of portions of the resistive circuit to the drive terminal based on the data to be optically encoded, and wherein: a first portion of the control circuit is coupled to a first of the plurality of portions of the resistive circuit, and a second portion of the control circuit is coupled to a second of the plurality of portions of the resistive circuit; and the first portion of the resistive circuit is configured to provide a voltage of a first polarity across the drive terminal, and the second portion of the resistive circuit is configured to provide a voltage of a second polarity across the drive terminal, the first and second polarities being opposite polarities. 9. The integrated circuit of claim 8 , wherein: the first portion of the resistive circuit includes: two or more sub-circuits coupled in parallel, and a configuration terminal for receiving a configuration signal; and the modulator driver circuit is configured to modulate a resistance of the first portion of the resistive circuit by selectively coupling one or more of the two or more sub-circuits between the drive terminal and a first of the one or more supplies based on the configuration signal. 10. The integrated circuit of claim 8 , wherein the control circuit include a differential cascode voltage switch (DCVS) circuit. 11. The integrated circuit of claim 8 , wherein the one or more supplies include an input/output power supply and a core logic power supply. 12. The integrated circuit of claim 8 , wherein: the semiconductor device is a PIN diode, and the portion of the semiconductor device is an intrinsic region of the PIN diode. 13. The integrated circuit of claim 8 , wherein the integrated circuit is a monolithic integrated circuit fabricated in a standard CMOS process. 14. An integrated circuit for controlling an optical modulator, the optical modulator configured to encode data in an optical signal carried by an optical waveguide, the optical modulator including a semiconductor device, an optical property of the optical waveguide depending on a concentration of charge carriers in a portion of a semiconductor device, the integrated circuit comprising: a modulator driver circuit including: a data terminal for receiving data to be optically encoded; a supply terminal for coupling to one or more supplies; a drive terminal for coupling to the optical modulator; a resistive circuit coupled between the supply terminal and the drive terminal, the resistive circuit including a plurality of portions; and a control circuit coupled between the data terminal and the resistive circuit, the control circuit being configured to modulate a resistance of the resistive circuit by selectively coupling one or more of the plurality of portions of the resistive circuit to the drive terminal based on the data to be optically encoded, wherein the control circuit includes a differential cascode voltage switch (DCVS) circuit. 15. The integrated circuit of claim 14 , wherein: a first portion of the control circuit is coupled to a first of the plurality of portions of the resistive circuit, and a second portion of the control circuit is coupled to a second of the plurality of portions of the resistive circuit; and the first portion of the resistive circuit is configured to provide a voltage of a first polarity across the drive terminal, and the second portion of the resistive circuit is configured to provide a voltage of a second polarity across the drive terminal, the first and second polarities being opposite polarities. 16. The integrated circuit of claim 15 , wherein: the first portion of the resistive circuit includes: two or more sub-circuits coupled in parallel, and a configuration terminal for recei

Assignees

Inventors

Classifications

  • in an optical waveguide structure (G02F1/017, {G02F1/2257} take precedence) · CPC title

  • involving resonance effects, e.g. resonantly enhanced interaction · CPC title

  • Circuits for the control or stabilisation of the bias voltage, e.g. automatic bias control [ABC] feedback loops · CPC title

  • H04B10/516Primary

    Details of coding or modulation · CPC title

  • Operation of devices; Circuit arrangements, not otherwise provided for in this subclass · CPC title

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What does patent US10587344B2 cover?
Devices and techniques for integrated optical data communication. A method of encoding symbols in an optical signal may include encoding a first symbol by injecting charge carriers, at a first rate, into a semiconductor device, such as a PIN diode. The method may also include encoding a second symbol by injecting charge carriers, at a second rate, into the semiconductor device. The first rate m…
Who is the assignee on this patent?
Massachusetts Inst Technology
What technology area does this patent fall under?
Primary CPC classification H04B10/516. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 10 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).