Method and apparatus for on-chip per-pixel pseudo-random time coded exposure
US-9743024-B2 · Aug 22, 2017 · US
US10575799B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10575799-B2 |
| Application number | US-201815960237-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 23, 2018 |
| Priority date | Apr 24, 2017 |
| Publication date | Mar 3, 2020 |
| Grant date | Mar 3, 2020 |
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An apparatus for collecting data is provided. According to an example, the apparatus for collection data may include: n number of detector arrays, n number of DAS circuits and a back-end processor. Each of the DAS circuits may include an analog-to-digital converter and a front-end processor coupled with the analog-to-digital converter. Each of front-end processors is coupled with the back-end processor via an independent transmission line. For each of the detector arrays, the detector array may be configured to output analog signals based on detected scanning rays penetrating through a subject. The analog-to-digital converter may be configured to perform an analog-to-digital conversion on the analog signals to generate raw data. The front-end processor may be configured to logarithmically compress the raw data and transmit the logarithmically-compressed raw data to the back-end processor via the transmission line.
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The invention claimed is: 1. A method of collecting data, applied to an apparatus for collecting data, wherein the apparatus for collecting data comprises: n number of detector arrays, wherein n is an integer greater than or equal to 1; n number of data acquisition system (DAS) circuits respectively coupled with one detector array, wherein each of the DAS circuits comprises an analog-to-digital converter and a front-end processor coupled with the analog-to-digital converter; and a back-end processor coupled with each of the front-end processors, wherein each of the front-end processors is coupled with the back-end processor via an independent transmission line; the method comprises: for each of the detector arrays, generating, by the detector array, analog signals based on scanning rays which penetrate through a subject and detected by the detector array; outputting, by the detector array, the analog signals to the analog-to-digital converter coupled with the detector array; performing, by the analog-to-digital converter, an analog-to-digital conversion on the analog signals to generate raw data; outputting, by the analog-to-digital converter, the raw data to the front-end processor coupled with the analog-to-digital converter; logarithmically compressing, by the front-end processor, the raw data to obtain logarithmically compressed raw data; and transmitting, by the front-end processor, the logarithmically compressed raw data to the back-end processor via the independent transmission line connecting the front-end processor and the back-end processor. 2. The method according to claim 1 , wherein each of the front-end processors comprises: a memory storing a logarithm table; and a first Field Programmable Gate Array (FPGA) for logarithmically compressing the raw data by searching the logarithm table. 3. The method according to claim 2 , wherein each of the front-end processors comprises a same configuration equation as the first FPGA. 4. The method according to claim 1 , further comprising: synchronically receiving and latching, by the back-end processor, the logarithmically compressed raw data transmitted by the front-end processors. 5. The method according to claim 4 , wherein the back-end processor comprises: a clock generator for providing a clock signal; and a second FPGA for synchronically receiving and latching the logarithmically compressed raw data transmitted by the front-end processors at an edge of the clock signal. 6. The method according to claim 1 , wherein the transmission line comprises a plurality of flexible cables. 7. The method according to claim 1 , wherein the transmission line comprises a circuit board containing a flexible portion. 8. The method according to claim 1 , further comprising: outputting, by the back-end processor, the logarithmically compressed raw data to a computer for reconstructing an image. 9. An apparatus for collecting data, comprising: n number of detector arrays, respectively configured to output analog signals based on scanning rays which penetrate through a subject and detected by the detector arrays, wherein n is an integer greater than 1; n number of data acquisition system (DAS) circuits respectively coupled with one of the detector arrays, wherein each of the DAS circuits comprises an analog-to-digital converter to perform an analog-to-digital conversion on the analog signals to generate raw data, and a front-end processor coupled with the analog-to-digital converter and configured to logarithmically compress the raw data; and a back-end processor coupled with each of front-end processors via an independent transmission line and configured to receive the logarithmically compressed raw data transmitted by each of the front-end processors via the independent transmission line. 10. The apparatus according to claim 9 , wherein each of the front-end processor comprises: a memory storing a logarithm table; and a first Field Programmable Gate Array (FPGA) for logarithmically compressing the raw data by searching the logarithm table. 11. The apparatus according to claim 10 , wherein each of the front-end processors comprises a same configuration equation as the first FPGA. 12. The apparatus according to claim 9 , wherein the back-end processor is further configured to: synchronically receive and latch the logarithmically compressed raw data transmitted by the respective front-end processors. 13. The apparatus according to claim 9 , wherein the back-end processor comprises: a clock generator for providing a clock signal; and a second FPGA configured to synchronically receive and latch the logarithmically compressed raw data transmitted by the respective front-end processors at an edge of the clock signal. 14. The apparatus according to claim 9 , wherein the transmission line comprises a plurality of flexible cables. 15. The apparatus according to claim 9 , wherein the transmission line comprises a circuit board containing a flexible portion. 16. The apparatus according to claim 9 , wherein the back-end processor is further configured to output the logarithmically compressed raw data to a computer for reconstructing an image.
using tomography, e.g. computed tomography [CT] · CPC title
Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title
Devices using data or image processing specially adapted for radiation diagnosis · CPC title
Arrangements for detecting radiation specially adapted for radiation diagnosis · CPC title
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