Method and apparatus for on-chip per-pixel pseudo-random time coded exposure

Patent metadata

Field	Value
Publication number	US-9743024-B2
Application number	US-201514789601-A
Country	US
Kind code	B2
Filing date	Jul 1, 2015
Priority date	Jul 1, 2015
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

Conventional methods for imaging transient targets are constrained by a trade-off between resolution and frame rate, and transient targets moving faster than the detector frame typically result in image blurring. Imagers using digital-pixel focal plane arrays (“DFPAs”) have on-chip global pixel operation capability for extracting a single transient-feature (i.e., single-frequency discrimination) in a snapshot that depends on the number of counters implemented per pixel. However, these DFPA systems are not capable of multi-target and multi-frequency discrimination. Imagers described herein achieve multi-target transient signature discrimination orders of magnitude faster than the readout frame rate using in-pixel electronic shuttering with a known time-encoded modulation. Three-dimensional (x,y,t) data cube reconstruction is performed using compressive sensing algorithms.

First claim

The invention claimed is:

1. A focal plane imaging apparatus comprising:
a plurality of photodetectors, the plurality of photodetectors comprising a first photodetector to convert a first portion of light that is scattered and/or reflected from a scene into a first analog signal and a second photodetector to convert a second portion of light that is scattered and/or reflected from the scene into a second analog signal;
a plurality of analog to digital converters (ADCs), the plurality of ADCs comprising a first ADC electrically coupled to the first photodetector and configured to convert the first analog signal into a first digital signal and a second ADC electrically coupled to the second photodetector and configured to convert the second analog signal into a second digital signal;
a plurality of digital registers, the plurality of digital registers comprising a first digital register electrically coupled to the first ADC and configured to store a first digital number representing the first digital signal and a second digital register electrically coupled to the second ADC and configured to store a second digital number representing the second digital signal; and
a distributed control pattern generator operably coupled to the plurality of ADCs and/or the plurality of digital registers and configured to modulate, at a rate faster than a readout rate of the plurality of digital registers, storage of the first digital number with a first pseudo-random modulation and to modulate storage of the second digital number with a second pseudo-random modulation so as to control spatial correlation of the first digital number with the second digital number.

2. The focal plane imaging apparatus according to claim 1 , wherein the first digital register is a bidirectional counter configured to increment or decrement the first digital number based on the first pseudo-random modulation.

3. The focal plane imaging apparatus according to claim 1 , wherein the first pseudo-random modulation is based on:
a value stored in a first temporal modulator electrically coupled to the first ADC and/or the first digital register,
a value stored in a memory,
a value stored in a configuration bit of the first digital register, and/or
a peripheral selection signal.

4. The focal plane imaging apparatus according to claim 1 , wherein the distributed control pattern generator includes a plurality of electrically interconnected control registers.

5. The focal plane imaging apparatus according to claim 4 , wherein the plurality of electrically interconnected control registers are configured to set a register state of the first digital register based on a previous register state of the first digital register and the first digital signal.

6. The focal plane imaging apparatus according to claim 1 , wherein the distributed control pattern generator is further configured to increment the first digital number, decrement the first digital number, negate the first digital number and/or shift the first digital number to another digital register in the plurality of digital registers based on:
the first digital number,
a previous state of the first digital register, and/or
a group assignment issued by the electronic circuitry.

7. The focal plane imaging apparatus according to claim 1 , wherein the distributed control pattern generator is configured to apply the first pseudo-random modulation at:
an enable pin of the first digital register;
a counter direction pin of the first digital register;
a clock pin of the first digital register; and/or
a mode selection bus of the first digital register.

8. The focal plane imaging apparatus according to claim 1 , further comprising a map register, in electrical communication with the plurality of digital registers, to store time-varying photodetector group assignments, wherein the first pseudo-random modulation is based on a time-varying photodetector group assignment of the first photodetector.

9. The focal plane imaging apparatus according to claim 8 , wherein the time-varying photodetector group assignments vary across the plurality of digital registers.

10. The focal plane imaging apparatus according to claim 1 , further comprising:
another plurality of digital registers, electrically coupled to the plurality of ADCs, to collect an unmodulated image of the scene.

11. The focal plane imaging apparatus according to claim 1 , further comprising:
a processor, operably coupled to the plurality of digital registers and configured to calculate and output a reconstructed image of the scene based on at least one of the first pseudo-random modulation, the second pseudo-random modulation, the first digital number, and the second digital number.

12. A method of focal plane imaging using a digital focal plane array (DFPA), the method comprising:
converting a plurality of photocurrents, generated in a plurality of two-dimensionally arrayed photodetectors of a DFPA from light originating from a scene of interest and incident thereon, into a plurality of corresponding digital signals using a plurality of corresponding analog-to-digital converters (ADCs);
storing a plurality of digital numbers in a plurality of digital registers, each digital number in the plurality of digital numbers representing a corresponding digital signal in the plurality of digital signals; and
modulating, via a distributed control pattern generator, storage of the plurality of digital numbers with pseudo-random modulation at a rate faster than a readout rate of the plurality of digital registers so as to control a spatial correlation of the plurality of digital numbers.

13. The method according to claim 12 , further comprising:
forming a multi-dimensional image of the scene of interest based on the pseudo-random modulation and values stored in the plurality of digital registers.

14. The method according to claim 12 , further comprising:
incrementing, decrementing, negating, and/or shifting to a digital register of another of the plurality of photodetectors, independently for each of the plurality of photodetectors, a value of the corresponding digital register, based on: the corresponding digital number, a previous state of said digital register, and/or a group assignment issued by the temporal modulator.

15. The method according to claim 12 , wherein modulating the storage of the plurality of digital numbers comprises pseudo-randomly modulating at least one enable pin of at least one digital register of the plurality of digital registers.

16. The method according to claim 15 , further comprising:
controlling a signal at a clock pin of the at least one digital register; and
controlling a signal of a mode selection bus of the at least one digital register.

17. The method according to claim 16 , further comprising:
setting a register state of the at least one digital register based on a previous register state of the at least one digital register and an output of a corresponding ADC in the plurality of ADCs.

18. The method according to claim 12 , further comprising:
assigning each photodetector of the plurality of photodetectors to a respective group based on the pseudo-random modulation.

19. An imaging apparatus comprising:
a photodetector array to generate an analog representation of light that is scattered and/or reflected from a scene;
an analog-to-digital converter (ADC) array, operably coupled to the photodetector array, to convert the analog representation of the scene into a digital representation of the scene;
electronic circuitry, operably

Assignees

• Tyrrell Brian M
• Cull Christy Fernandez
• Bolstad Andrew K
• Massachusetts Inst Technology

Inventors

• Tyrrell Brian M
• Cull Christy Fernandez
• Bolstad Andrew K

Classifications

• H04N25/772 Primary

  comprising A/D, V/T, V/F, I/T or I/F converters · CPC title

• H04N25/00 Primary

  Circuitry of solid-state image sensors [SSIS]; Control thereof · CPC title

• H04N7/18

  Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast · CPC title

• H04N5/37455 Primary

  Electricity · mapped topic

• H04N5/335

  Electricity · mapped topic