Solar cell and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-10573770-B2
Application number	US-201615097897-A
Country	US
Kind code	B2
Filing date	Apr 13, 2016
Priority date	Nov 19, 2008
Publication date	Feb 25, 2020
Grant date	Feb 25, 2020

Abstract

Discussed is a method of manufacturing a solar cell including preparing a single crystalline silicon substrate having a first conductive type impurity; forming a non-single crystalline silicon emitter layer having a second conductive type impurity opposite to the first conductive type impurity on a first surface of the single crystalline silicon substrate; forming a first transparent conductive oxide layer on the first surface of the single crystalline silicon substrate; forming a first electrode electrically connected to the first transparent conductive oxide layer; and forming a second electrode electrically connected to the single crystalline silicon substrate, wherein the forming of the first electrode includes; forming a first seed layer on the first transparent conductive oxide layer, and forming a first plating layer over the first seed layer by plating a first conductive material.

First claim

What is claimed is:

1. A method of manufacturing a solar cell, the method comprising:
preparing a single crystalline silicon substrate having a first conductive type impurity;
forming a non-single crystalline silicon emitter layer having a second conductive type impurity opposite to the first conductive type impurity on a first surface of the single crystalline silicon substrate;
forming a first transparent conductive oxide layer on the first surface of the single crystalline silicon substrate;
forming a first electrode electrically connected to the first transparent conductive oxide layer; and
forming a second electrode electrically connected to the single crystalline silicon substrate,
wherein the forming of the first electrode includes;
forming a first seed layer on the first transparent conductive oxide layer, and
forming a first plating layer over the first seed layer by plating a first conductive material, and
wherein a density of the first plating layer is greater than a density of the first seed layer, and
wherein the first seed layer is formed by a direct printing so as to have a predetermined pattern.

2. The method of claim 1 , further comprising forming a second transparent conductive oxide layer over a second surface of the single crystalline silicon substrate opposite to the first surface of the single crystalline silicon substrate.

3. The method of claim 2 , further comprising forming a back surface field layer over the second surface of the single crystalline silicon substrate.

4. The method of claim 2 , wherein the second electrode is electrically connected to the second transparent conductive oxide layer.

5. The method of claim 2 , wherein the forming of the second electrode includes,
forming a second seed layer on the second transparent conductive oxide layer, and
forming a second plating layer over the second seed layer by plating a second conductive material.

6. A method of manufacturing a solar cell, the method comprising:
preparing a single crystalline silicon substrate having a first conductive type impurity;
forming a non-single crystalline silicon emitter layer having a second conductive type impurity opposite to the first conductive type on a first surface of the single crystalline silicon substrate;
forming a first transparent conductive oxide layer on the first surface of the single crystalline silicon substrate;
forming a first electrode electrically connected to the first transparent conductive oxide layer; and
forming a second electrode electrically connected to the single crystalline silicon substrate,
wherein the forming of the first electrode includes;
forming a first plating resist layer on a portion of the first transparent conductive oxide layer to expose another portion of the first transparent conductive oxide layer;
plating the first conductive material on the exposed portion of the first transparent conductive oxide layer using the exposed portion of the first transparent conductive oxide layer as a seed layer to form the first electrodes; and
removing the first plating resist layer,
wherein the forming of the first electrode includes:
forming a first electrode pattern to form a first conductive layer extending substantially parallel to one another in a first direction on the first transparent conductive oxide layer, and forming a first current collector pattern to form a second conductive layer extending substantially parallel to one another in a second direction crossing the first direction on the first transparent conductive oxide layer, the forming of the first electrode pattern and the forming of the first current collector pattern being performed using a direct printing; and
plating the first conductive material along the first and second conductive layers as a seed layer to form first and second plated layers.

7. The method of claim 6 , further comprising forming a second transparent conductive oxide layer over a second surface of the single crystalline silicon substrate opposite to the first surface of the single crystalline silicon substrate.

8. The method of claim 6 , further comprising forming a back surface field layer over the second surface of the single crystalline silicon substrate.

9. The method of claim 7 , wherein the forming of the second electrode includes;
forming a second plating resist layer on a portion of the second transparent conductive oxide layer to expose another portion of the second transparent conductive oxide layer;
plating the second conductive material on the exposed portion of the second transparent conductive oxide layer using the exposed portion of the second transparent conductive oxide layer as a seed layer to form the second electrode; and
removing the second plating resist layer.

10. The method of claim 6 , wherein the first and second plated layers cover an entire surface of the first and second conductive layers except a contact surface with the first transparent conductive oxide layer.

11. The method of claim 6 , wherein the non-single crystalline silicon emitter layer includes amorphous silicon deposited by a chemical vapor deposition (CVD) method or a physical vapor deposition (PVD) method.

12. The method of claim 8 , wherein the back surface field layer includes amorphous silicon deposited by a chemical vapor deposition (CVD) method or a physical vapor deposition (PVD) method.

13. A method of manufacturing a solar cell, the method comprising:
preparing a single crystalline silicon substrate having a first conductive type impurity;
forming a non-single crystalline silicon emitter layer having a second conductive type impurity opposite to the first conductive type impurity on a rear surface of the single crystalline silicon substrate;
forming a non-single crystalline silicon back surface field (BSF) layer having the first conductive type impurity more heavily doped than the single crystalline silicon substrate on the rear surface of the single crystalline silicon substrate;
forming a first seed layer connected to the non-single crystalline silicon emitter layer;
forming a second seed layer connected to the non-single crystalline silicon BSF layer;
plating a first conductive metal over the first seed layer to form a first plated layer; and
plating a second conductive metal over the second seed layer to form a second plated layer,
wherein a density of the first plated layer is greater than a density of the first seed layer,
wherein a density of the second plated layer is greater than a density of the second seed layer, and
wherein the first seed layer and the second seed layer are formed by a direct printing so as to have a predetermined pattern.

14. The method of claim 13 , wherein the first and second seed layers are formed simultaneously, and
wherein the first and second plated layers are formed simultaneously.

15. The method of claim 13 , wherein the first and second seed layers are seed layers for plating to form the first and second plated layers, respectively.

16. The method of claim 13 , wherein the first seed layer and the first plated layer are formed using different methods, and
wherein the second seed layer and the second plated layer are formed using different methods.

17. The method of claim 16 ,
wherein the first and second plated layers are formed using a plating method, and
wherein the first plated layer is only formed on the first seed layer, and the second plated layer is only formed on the second seed layer.

18. The method of claim 6 , wherein the first and second plated layers cover an entire

Assignees

• Lg Electronics Inc

Inventors

• Kim Sunho
• Lee Heonmin
• Ji Kwangsun
• Eo Youngjoo
• Choi Junghoon
• Ahn Sehwon

Classifications

• H05K2201/0108

  Transparent · CPC title

• C25D7/126 Primary

  for solar cells · CPC title

• H05K3/246

  Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating · CPC title

• H05K3/188

  by direct electroplating · CPC title

• Y02E10/50

  Photovoltaic [PV] energy · CPC title