Storage system and method for namespace reservation in a multi-queue single-controller environment

Patent metadata

Field	Value
Publication number	US-10558376-B2
Application number	US-201816021813-A
Country	US
Kind code	B2
Filing date	Jun 28, 2018
Priority date	Jun 28, 2018
Publication date	Feb 11, 2020
Grant date	Feb 11, 2020

Abstract

A storage system and method for namespace reservation in a multi-queue single-controller environment are provided. In one embodiment, a method for access control in a memory is performed in a storage system comprising a memory and a controller in communication with a plurality of hosts, wherein each host comprises its own set of input-output queues but only one host comprises an admin queue. The method comprises receiving a mapping that restricts access to portions of the memory to specific ones of the plurality of hosts, wherein the mapping is generated by the host that comprises the admin queue; and restricting access to the portions of the memory based on the mapping. Other embodiments are provided.

First claim

What is claimed is:

1. A method for access control in a memory, the method comprising:
performing the following in a storage system comprising a memory and a controller in communication with a plurality of hosts, wherein each host comprises its own set of input-output queues but only one host comprises an admin queue and the admin queue is shared by other hosts of the plurality of hosts, and wherein the admin queue is configured to generate a mapping that associates portions of the memory to identifiers of the sets of input-output queues in the other hosts of the plurality of hosts;
receiving the mapping from the admin queue; and
restricting access to the respective portions of the memory based on the mapping, wherein a host is allowed access to a portion of the memory only if the identifier of the host's set of input-output queues is associated with the portion of the memory in the mapping.

2. The method of claim 1 , wherein the mapping is received via one of the plurality of hosts that does not comprise the admin queue.

3. The method of claim 1 , wherein the mapping is based on command identifiers of the plurality of hosts.

4. The method of claim 1 , wherein the mapping is received via the host that comprises the admin queue.

5. The method of claim 1 , wherein the memory comprises a three-dimensional memory.

6. The method of claim 1 , wherein the memory further comprises a portion that is accessible by the plurality of hosts.

7. The method of claim 1 , wherein the storage system comprises a solid state drive (SSD).

8. The method of claim 1 , wherein the storage system and the plurality of hosts are part of an automobile.

9. A system comprising:
a first host comprising a first set of input-output queues and an admin queue;
a second host comprising a second set of input-output queues but not an admin queue, wherein the second host shares the admin queue of the first host;
a storage system comprising a controller and a memory; and
a switch configured to allow communication between the first host, the second host, and the storage system;
wherein the first host is configured to use the admin queue to:
create a first association between the first set of input-output queues and a first namespace in the memory, wherein the first association associates the first namespace with an identifier of the first set of input-output queues or a command identifier of the first host; and
create a second association between the second set of input-output queues and a second namespace in the memory, wherein the second association associates the second namespace with an identifier of the second set of input-output queues or a command identifier of the second host;

wherein the controller of the storage system is configured to restrict access to the first and second namespaces in the memory to the first and second hosts, respectively, based on the first and second associations.

10. The system of claim 9 , wherein the first and second associations are sent to the storage system from one of the first and second set of input-output queues.

11. The system of claim 9 , wherein the memory comprises a three-dimensional memory.

12. The system of claim 9 , wherein the memory further comprises a namespace that is shared by the first and second hosts.

13. The system of claim 9 , wherein the storage system comprises a solid state drive (SSD).

14. The system of claim 9 , wherein the storage system and the first and second hosts are part of an automobile.

15. A host comprising:
a first set of input-output queues;
an admin queue shared by the host and a second host;
an interface through which to communicate with a storage system comprising a controller and a memory and with the second host comprising a second set of input-output queues, wherein the second host shares the admin queue of the host; and
means for creating a first association between the first set of input-output queues and a first namespace in the memory and a second association between the second set of input-output queues and a second namespace in the memory, wherein the first association associates a first namespace with an identifier of the first set of input-output queues or a command identifier of the host, and wherein the second association associates a second namespace with an identifier of the second set of input-output queues or a command identifier of the second host;
wherein the controller of the storage system is configured to restrict access to the first and second namespaces to the first and second hosts, respectively, based on the first and second associations.

16. The host of claim 15 , wherein the memory comprises a three-dimensional memory.

17. The host of claim 15 , wherein the storage system comprises a solid state drive (SSD).

18. The host of claim 15 , wherein the host is part of an automobile.

Assignees

• Western Digital Tech Inc

Inventors

• Hahn Judah Gamliel
• Benisty Shay

Classifications

• G06F3/0673

  Single storage device · CPC title

• G06F3/0679 Primary

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/0622 Primary

  in relation to access · CPC title

• G06F3/0644

  Management of space entities, e.g. partitions, extents, pools · CPC title

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title