Semiconductor device
US-9214409-B2 · Dec 15, 2015 · US
US10515976B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10515976-B2 |
| Application number | US-201815885878-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 1, 2018 |
| Priority date | Feb 1, 2018 |
| Publication date | Dec 24, 2019 |
| Grant date | Dec 24, 2019 |
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A semiconductor device includes a semiconductor substrate, an isolation structure; a first gate dielectric layer and a first gate electrode. The isolation structure is formed in the semiconductor substrate to divide the semiconductor substrate at least into a first active region and a second active region. The first gate dielectric layer is disposed on the first active region, and has a plane top surface contacting to a sidewall of the isolation structure and forming an acute angle therewith. The first gate electrode stacked on the plane top surface.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a semiconductor substrate; an isolation structure, formed in the semiconductor substrate to at least divide the semiconductor substrate into a first active region, a second active region and a third active region; a first gate dielectric layer, comprising a high dielectric constant material, disposed on the first active region, and having a plane top surface directly contacting to a sidewall of the isolation structure and forming an acute angle therewith; a first gate electrode, stacked on the plane top surface; a second gate dielectric layer made of silicon dioxide, and disposed on the second active region; a second gate electrode, stacked on the second gate dielectric layer; a dielectric layer, disposed on the third active region and having an oxide-nitride-oxide (ONO) charge trapping structure; and a third gate electrode, stacked on the dielectric layer. 2. The semiconductor device according to claim 1 , wherein the isolation structure has a top surface substantially higher than the plane top surface of the first gate dielectric layer as calculated from the semiconductor substrate. 3. The semiconductor device according to claim 1 , wherein the first gate electrode comprises poly-silicon.
Making the insulator · CPC title
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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