Semiconductor device and method for fabricating the same

US10515976B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10515976-B2
Application numberUS-201815885878-A
CountryUS
Kind codeB2
Filing dateFeb 1, 2018
Priority dateFeb 1, 2018
Publication dateDec 24, 2019
Grant dateDec 24, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A semiconductor device includes a semiconductor substrate, an isolation structure; a first gate dielectric layer and a first gate electrode. The isolation structure is formed in the semiconductor substrate to divide the semiconductor substrate at least into a first active region and a second active region. The first gate dielectric layer is disposed on the first active region, and has a plane top surface contacting to a sidewall of the isolation structure and forming an acute angle therewith. The first gate electrode stacked on the plane top surface.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a semiconductor substrate; an isolation structure, formed in the semiconductor substrate to at least divide the semiconductor substrate into a first active region, a second active region and a third active region; a first gate dielectric layer, comprising a high dielectric constant material, disposed on the first active region, and having a plane top surface directly contacting to a sidewall of the isolation structure and forming an acute angle therewith; a first gate electrode, stacked on the plane top surface; a second gate dielectric layer made of silicon dioxide, and disposed on the second active region; a second gate electrode, stacked on the second gate dielectric layer; a dielectric layer, disposed on the third active region and having an oxide-nitride-oxide (ONO) charge trapping structure; and a third gate electrode, stacked on the dielectric layer. 2. The semiconductor device according to claim 1 , wherein the isolation structure has a top surface substantially higher than the plane top surface of the first gate dielectric layer as calculated from the semiconductor substrate. 3. The semiconductor device according to claim 1 , wherein the first gate electrode comprises poly-silicon.

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Frequently asked questions

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What does patent US10515976B2 cover?
A semiconductor device includes a semiconductor substrate, an isolation structure; a first gate dielectric layer and a first gate electrode. The isolation structure is formed in the semiconductor substrate to divide the semiconductor substrate at least into a first active region and a second active region. The first gate dielectric layer is disposed on the first active region, and has a plane t…
Who is the assignee on this patent?
United Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification H01L27/11573. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 24 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).