Memory cell and manufacturing method thereof
US-9209198-B2 · Dec 8, 2015 · US
US9166013B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9166013-B2 |
| Application number | US-201314020645-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 6, 2013 |
| Priority date | Apr 18, 2013 |
| Publication date | Oct 20, 2015 |
| Grant date | Oct 20, 2015 |
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A nonvolatile memory device having a plurality of unit cells, each of the plurality of unit cells includes a first transistor suitable for having a fixed threshold voltage, and a second transistor suitable for coupling to the first transistor in parallel and having a variable threshold voltage.
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What is claimed is: 1. A nonvolatile memory device, comprising: an isolation trench formed on a substrate and defining an active region; a charge trapping layer formed on a surface of the isolation trench; a gap-fill insulating layer partially filling the isolation trench on the charge trapping layer; a gate formed on the substrate and filling a remaining isolation trench on the gap-fill insulating layer; and a source and a drain formed on the active region under both side…
Electricity · mapped topic
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