Photonic integration platform

US10509174B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10509174-B2
Application numberUS-201816052524-A
CountryUS
Kind codeB2
Filing dateAug 1, 2018
Priority dateJul 3, 2013
Publication dateDec 17, 2019
Grant dateDec 17, 2019

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.

First claim

Opening claim text (preview).

We claim: 1. A SOI optical device, comprising: a semiconductor substrate; an insulation layer disposed on the substrate; a crystalline silicon layer disposed on the insulation layer and comprising a silicon waveguide; and a plurality of prongs configured to at least one of receive and transmit optical energy via a coupling surface of the SOI optical device, wherein the plurality of prongs are positioned such that the optical energy transmitted by the plurality of prongs is transferred to the silicon waveguide, wherein at least two prongs in the plurality of prongs are located in a first layer while another prong in the plurality of prongs is located in a second layer different from the first layer, and wherein a dimension of the silicon waveguide changes as the silicon waveguide extends away from the coupling surface. 2. The SOI optical device of claim 1 , wherein each of the plurality of prongs is surrounded by an insulative material such that none of the plurality of prongs directly contact. 3. The SOI optical device of claim 1 , wherein the silicon waveguide is located between the insulation layer and the plurality of prongs, wherein a length of each of the plurality of prongs extending from the coupling surface is the same. 4. The SOI optical device of claim 1 , wherein the plurality of prongs terminates at one of: (i) the coupling surface and (ii) a plane recessed from and parallel to the coupling surface. 5. The SOI optical device of claim 1 , wherein a dimension of the plurality of prongs reduces as the prongs extend in a direction away from the coupling surface, and wherein the dimension of the silicon waveguide increases as a first prong of the plurality of prongs extends away from the coupling surface, wherein at least one of the plurality of prongs overlaps the silicon waveguide such that an optical signal transmitted by the plurality of prongs is transferred to the silicon waveguide. 6. The SOI optical device of claim 5 , wherein a length of at least one prong of the plurality of prongs in the direction that extends away from the coupling surface is greater than each of the respective lengths of the other prongs of the plurality of prongs. 7. The SOI optical device of claim 1 , wherein each of the plurality of prongs is surrounded by an insulative material different from a material of the silicon waveguide. 8. The SOI optical device of claim 1 , wherein the plurality of prongs is in a stacked relationship with the silicon waveguide. 9. The SOI optical device of claim 8 , wherein at least one of the plurality of prongs directly overlaps the silicon waveguide. 10. A semiconductor chip, comprising: a semiconductor substrate; an insulation layer disposed on the substrate; a crystalline silicon layer disposed on the insulation layer and comprising a silicon waveguide; and a plurality of prongs configured to at least one of receive and transmit optical energy via a coupling surface of the semiconductor chip, wherein the plurality of prongs are positioned such that the optical energy transmitted by the plurality of prongs is transferred to the silicon waveguide, wherein at least two prongs in the plurality of prongs are located in a first layer while another prong in the plurality of prongs is located in a second layer different from the first layer, and wherein a dimension of the silicon waveguide changes as the silicon waveguide extends away from the coupling surface. 11. The semiconductor chip of claim 10 , wherein each of the plurality of prongs is surrounded by an insulative material such that none of the plurality of prongs directly contact. 12. The semiconductor chip of claim 10 , wherein the silicon waveguide is located between the insulation layer and the plurality of prongs, wherein a length of each of the plurality of prongs extending from the coupling surface is the same. 13. The semiconductor chip of claim 10 , wherein the plurality of prongs terminates at one of: (i) the coupling surface and (ii) a plane recessed from and parallel to the coupling surface. 14. The semiconductor chip of claim 10 , wherein a dimension of the plurality of prongs reduces as the prongs extend in a direction away from the coupling surface, and wherein the dimension of the silicon waveguide increases as a first prong of the plurality of prongs extends away from the coupling surface, wherein at least one of the plurality of prongs overlaps the silicon waveguide such that an optical signal transmitted by the plurality of prongs is transferred to the silicon waveguide. 15. The semiconductor chip of claim 14 , wherein a length of at least one prong of the plurality of prongs in the direction that extends away from the coupling surface is greater than each of the respective lengths of the other prongs of the plurality of prongs. 16. The semiconductor chip of claim 10 , wherein each of the plurality of prongs is surrounded by an insulative material different from a material of the silicon waveguide. 17. The semiconductor chip of claim 10 , wherein the plurality of prongs is in a stacked relationship with the silicon waveguide. 18. The semiconductor chip of claim 17 , wherein at least one of the plurality of prongs directly overlaps the silicon waveguide. 19. An optical device, comprising: a semiconductor substrate; an insulation layer disposed on the substrate; a crystalline silicon waveguide disposed on the insulation layer; and a plurality of prongs configured to at least one of receive and transmit optical energy via a coupling surface of the optical device, wherein the plurality of prongs are positioned such that the optical energy transmitted by the plurality of prongs is transferred to the silicon waveguide, wherein at least two prongs in the plurality of prongs are located in a first layer while another prong in the plurality of prongs is located in a second layer different from the first layer, and wherein a dimension of the silicon waveguide changes as the silicon waveguide extends away from the coupling surface. 20. The optical device of claim 19 , wherein each of the plurality of prongs is surrounded by an insulative material different from a material of the silicon waveguide.

Assignees

Inventors

Classifications

  • G02B6/30Primary

    for use between fibre and thin-film device · CPC title

  • Tapered waveguides, e.g. integrated spot-size transformers (for coupling with fibres G02B6/305) · CPC title

  • Subwavelength-diameter waveguides, e.g. nanowires · CPC title

  • of the integrated circuit kind (electric integrated circuits H10B, H10D84/00 - H10D89/00, H10F19/00, H10F39/00, H10H29/00, H10K19/00, H10K39/00, H10K59/00, H10N19/00, H10N39/00, H10N59/00, H10N69/00, H10N79/00, H10N89/00) · CPC title

  • Mode converters · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10509174B2 cover?
A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI …
Who is the assignee on this patent?
Cisco Tech Inc
What technology area does this patent fall under?
Primary CPC classification G02B6/30. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 17 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).