Photonic integration platform

US9651739B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9651739-B2
Application numberUS-201514946946-A
CountryUS
Kind codeB2
Filing dateNov 20, 2015
Priority dateJul 3, 2013
Publication dateMay 16, 2017
Grant dateMay 16, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.

First claim

Opening claim text (preview).

We claim: 1. A silicon-on-insulator (SOI) optical device comprising: a semiconductor substrate; an insulation layer disposed above the substrate, wherein a waveguide is embedded in the insulation layer, and wherein the embedded waveguide comprises a waveguide adapter comprising multiple prongs exposed at an external coupling surface of the optical device, the external coupling surface being configured to couple to an external light source; and a crystalline silicon layer above the insulation layer, the silicon layer comprising a silicon waveguide that overlaps the embedded waveguide such that an optical signal transmitted in the embedded waveguide is transferred to the silicon waveguide. 2. The SOI optical device of claim 1 , wherein at least a portion of the embedded waveguide and a portion of the silicon waveguide are tapered where the embedded and silicon waveguides overlap in the optical device. 3. The SOI optical device of claim 1 , wherein the waveguide adapter comprises a first prong that is disposed above a second prong in the insulation layer relative to the substrate, and wherein a dimension of the second prong decreases as the second prong extends away from the external coupling surface and a dimension of the first prong increases as the first prong extends away from the external coupling surface. 4. The SOI optical device of claim 1 , wherein the substrate comprises a groove configured to passively align the external light source at the external coupling surface to introduce light into the multiple prongs of the waveguide adapter. 5. The SOI optical device of claim 1 , wherein the embedded and silicon waveguides are spaced apart no more than 500 nanometers where the silicon and embedded waveguides overlap. 6. The SOI optical device of claim 1 , wherein the insulation layer is a silicon type insulator and the embedded waveguide comprises one of silicon oxynitride and silicon nitride. 7. A silicon-on-insulator (SOI) optical device comprising: a semiconductor substrate; an insulation layer disposed above the substrate, wherein a waveguide is embedded in the insulation layer, wherein the insulation layer completely surrounds the embedded waveguide, and wherein the embedded waveguide comprises a waveguide adapter comprising multiple prongs exposed at an external coupling surface of the optical device, the external coupling surface being configured to couple to an external light source; and a crystalline silicon layer above the insulation layer, the silicon layer comprising a silicon waveguide that overlaps the embedded waveguide such that an optical signal transmitted in the embedded waveguide is transferred to the silicon waveguide. 8. The SOI optical device of claim 7 , wherein at least a portion of the embedded waveguide and a portion of the silicon waveguide are tapered where the embedded and silicon waveguides overlap in the optical device. 9. The SOI optical device of claim 7 , wherein the waveguide adapter comprises a first prong that is disposed above a second prong in the insulation layer relative to the substrate, and wherein a dimension of the second prong decreases as the second prong extends away from the external coupling surface and a dimension of the first prong increases as the first prong extends away from the external coupling surface. 10. The SOI optical device of claim 7 , wherein the substrate comprises a groove configured to passively align the external light source at the external coupling surface to introduce light into the multiple prongs of the waveguide adapter. 11. The SOI optical device of claim 7 , wherein the embedded and silicon waveguides are spaced apart no more than 500 nanometers where the silicon and embedded waveguides overlap. 12. The SOI optical device of claim 7 , wherein the insulation layer is a silicon type insulator and the embedded waveguide comprises one of silicon oxynitride and silicon nitride.

Assignees

Inventors

Classifications

  • G02B6/30Primary

    for use between fibre and thin-film device · CPC title

  • G02B6/305Primary

    and having an integrated mode-size expanding section, e.g. tapered waveguide · CPC title

  • Silicon · CPC title

  • Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections · CPC title

  • Mode converters · CPC title

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Frequently asked questions

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What does patent US9651739B2 cover?
A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI …
Who is the assignee on this patent?
Cisco Tech Inc
What technology area does this patent fall under?
Primary CPC classification G02B6/30. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 16 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).