Systems and methods for improved semiconductor etching and component protection

US10504754B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10504754-B2
Application numberUS-201615159530-A
CountryUS
Kind codeB2
Filing dateMay 19, 2016
Priority dateMay 19, 2016
Publication dateDec 10, 2019
Grant dateDec 10, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Semiconductor systems and methods may include a semiconductor processing chamber having a gas box defining an access to the semiconductor processing chamber. The chamber may include a spacer characterized by a first surface with which the gas box is coupled, and the spacer may define a recessed ledge on an interior portion of the first surface. The chamber may include a support bracket seated on the recessed ledge that extends along a second surface of the spacer. The chamber may also include a gas distribution plate seated on the support bracket.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor processing system comprising: a remote plasma source; a delivery tube coupled with the remote plasma source; an adapter on which the remote plasma source is seated, wherein the adapter defines a port through the adapater, and wherein the delivery tube extends through a central aperture of the adapter; an insert positioned within the delivery tube, wherein the insert provides access from the remote plasma source to a mixing region defined within the insert, and wherein the port defined through the adapter provides fluid access through the insert to the mixing region of the insert; and a semiconductor processing chamber, wherein the semiconductor processing chamber comprises: a gas box coupled about a distal region of the delivery tube, a first annular support contacting the gas box at a first surface of the first annular support, wherein the first annular support and the gas box together define a first channel about an interior region of the semiconductor processing chamber, and a gas distribution plate seated within the first channel. 2. The semiconductor processing system of claim 1 , further comprising: an annular liner seated on the gas distribution plate; and a top plate seated on the annular liner, wherein the annular liner and the top plate are both at least partially seated within the first channel. 3. The semiconductor processing system of claim 1 , further comprising a second annular support contacting the first annular support at a second surface of the first annular support opposite the first surface of the first annular support, wherein the second annular support and the first annular support together define a second channel about an interior region of the semiconductor processing chamber. 4. The semiconductor processing system of claim 3 , wherein the gas distribution plate is a first gas distribution plate, the semiconductor processing system further comprising a second gas distribution plate seated within the second channel. 5. The semiconductor processing system of claim 4 , wherein the first gas distribution plate and the second gas distribution plate comprise quartz, a ceramic, or coated aluminum. 6. The semiconductor processing system of claim 1 , further comprising at least one pin removably coupling the gas distribution plate with the first annular support. 7. The semiconductor processing system of claim 1 , wherein the delivery tube defines at least a portion of a channel between the remote plasma unit and the gas box configured to allow precursor delivery through the delivery tube into the semiconductor processing chamber that bypasses the remote plasma source. 8. The semiconductor processing system of claim 7 , wherein the insert provides access to the at least a portion of a channel of the delivery tube. 9. The semiconductor processing system of claim 8 , wherein the mixing region of the insert comprises a first mixing section characterized by a tapered shape from the access to the mixing region of the insert, and wherein the mixing region of the insert comprises a second mixing section characterized by an expanding internal diameter from a position proximate the first mixing section to an outlet of the delivery tube. 10. The semiconductor processing system of claim 9 , wherein the mixing region of the insert further comprises a third mixing section characterized by a cylindrical shape having an internal diameter that is less than half the internal diameter of the delivery tube. 11. The semiconductor processing system of claim 1 , wherein the gas box comprises a first gas box plate and a second gas box plate coupled with one another, wherein the second gas box plate at least partially contacts the first annular support along a second surface of the second gas box plate opposite a first surface of the second gas box plate contacting the first gas box plate, wherein the second gas box plate defines a plurality of channels, and wherein the coupled first gas box plate and second gas box plate define a flow path through the plurality of channels. 12. The semiconductor processing system of claim 11 , wherein the first gas box plate defines a port providing access to a channel of the plurality of channels. 13. The semiconductor processing system of claim 12 , wherein the second gas box plate defines at least one entry channel providing access from the plurality of channels to an interior region of the semiconductor processing chamber, wherein the at least one entry channel is positioned radially outward from the port defined by the first gas box plate.

Assignees

Inventors

Classifications

  • Thermal treatments, e.g. annealing or sintering · CPC title

  • characterised by the construction of the processing chambers, e.g. modular processing chambers · CPC title

  • mainly by convection · CPC title

  • H10P50/242Primary

    of Group IV materials · CPC title

  • for drying etching · CPC title

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Frequently asked questions

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What does patent US10504754B2 cover?
Semiconductor systems and methods may include a semiconductor processing chamber having a gas box defining an access to the semiconductor processing chamber. The chamber may include a spacer characterized by a first surface with which the gas box is coupled, and the spacer may define a recessed ledge on an interior portion of the first surface. The chamber may include a support bracket seated o…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10P50/242. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 10 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).