Circuit board with embedded metal pallet and a method of fabricating the circuit board

Patent metadata

Field	Value
Publication number	US-10499500-B2
Application number	US-201715803527-A
Country	US
Kind code	B2
Filing date	Nov 3, 2017
Priority date	Nov 4, 2016
Publication date	Dec 3, 2019
Grant date	Dec 3, 2019

Abstract

A metal pallet is integrated within a circuit board using a process similar to a multilayer PCB, which integrates the metal pallet into the circuit board at the same time as the supporting layers are fabricated. The use of B-stage material provides a bonding mechanism for the metal pallet to be embedded within the circuit board, creating a cohesive integrated part. Embedding the pallet during the fabrication process, pre-lamination, generates a more robust construction and connection not impacted by post fabrication process in assembly. After assembly the circuit board with embedded metal pallet can be mounted directly on a heat sink, cool ribbon or other feature required to help remove heat. The planar back side surface provides a more robust mounting of the metal pallet than a post fabricated assembly as used in conventional techniques.

First claim

What is claimed is:

1. A circuit board comprising:
a laminated stack of circuit board layers having a first outer surface and a second outer surface opposite the first outer surface, wherein the laminated stack of circuit board layers comprises a plurality of conductive layers layer and a plurality of non-conductive layers, one of the plurality of non-conductive layers is a prepreg bonding layer within an interior of the laminated stack, the prepreg bonding layer having a first surface and a second surface opposite the first surface;
a pallet cutout formed in the laminated stack from the second outer surface to the second surface of the prepreg bonding layer, the pallet cutout defined by side wall surfaces and the second surface of the prepreg bonding layer;
a metal pallet positioned within the pallet cutout, the metal pallet having a first surface and a second surface opposite the first surface, wherein the first surface of the metal pallet is in contact with and is bonded to the second surface of the prepreg bonding layer; and
a device cutout formed in the laminated stack from the first outer surface through the prepreg bonding layer to the first surface of the metal pallet;
wherein the second outer surface of the laminated stack and the second surface of the metal pallet are co-planar to form a planar back side surface of the circuit board.

2. The circuit board of claim 1 wherein the prepreg bonding layer comprises B-stage prepreg.

3. The circuit board of claim 1 wherein the pallet cutout is formed in a first portion of the laminated stack, and the first portion of the laminated stack comprises one or more prepreg layers, further wherein the metal pallet further comprises side surfaces and the side wall surfaces of the metal pallet are defined by the first portion of the laminated stack, and the side surfaces of the metal pallet are bonded to the side wall surfaces of the pallet cutout by resin flow from the one or more prepreg layers.

4. The method of claim 1 further comprising a plating layer coupled to the back side surface of the circuit board to form a continuous planar surface across the back side of the circuit board that is interconnected to the metal pallet.

5. The circuit board of claim 1 wherein the device cutout is sized to receive a heat generating device.

6. The circuit board of claim 1 further comprising a plating layer selectively coupled to the first outer surface of the laminated stack, wherein the plating layer is further coupled to side wall surfaces of the device cutout and the first surface of the metal pallet.

7. The circuit board of claim 2 wherein the pallet cutout is formed in a first portion of the laminated stack, further wherein the metal pallet further comprises side surfaces and the side wall surfaces of the pallet cutout are defined by the first portion of the laminated stack, and the side surfaces of the metal pallet are bonded to the side wall surfaces of the pallet cutout by resin flow from the B-stage prepreg.

8. The circuit board of claim 6 wherein the plating layer forms an interconnect between the metal pallet and any conductive layers in the laminated stack that intersect the side wall surfaces of the device cutout.

9. The circuit board of claim 6 wherein a portion of the plating on the side wall surfaces of the device cutout are selectively removed such that a remaining portion of the plating on the side wall surfaces of the device cutout forms an interconnect between the metal pallet and any conductive layers in the laminated stack that intersect the side wall surfaces of the device cutout coincident with the remaining portion of the plating.

10. A method of fabricating a circuit board with an embedded metal pallet, the method comprising:
stacking layers of a circuit board, wherein the layers comprise a plurality of
conductive layers layer and a plurality of non-conductive layers, wherein one of the plurality of non-conductive layers is a prepreg bonding layer within an interior of the stacked layers, further wherein a first portion of the stacked layers has a pallet cutout section, the pallet cutout section of each layer in the first portion are aligned to form a pallet cutout for receiving a metal pallet, further wherein the prepreg bonding layer forms a bottom surface of the pallet cutout;
inserting the metal pallet into the pallet cutout such that a first surface of the metal pallet contacts the prepreg bonding layer; and
laminating the stacked layers with inserted metal pallet to form a laminated stack and to bond the metal pallet to the prepreg bonding layer;
removing a second portion of the laminated stacked layers stacked over the metal pallet after laminating the stacked layers to form a device cutout that extends from a front side of the circuit board to the metal pallet, wherein the first surface of the metal pallet forms a bottom surface of the device cutout;
wherein laminating the stacked layers comprises compressing the stacked layers and the inserted metal pallet to form a planar back side surface of the circuit board where a bottom surface of the metal pallet is co-planar with a back side surface of the stacked layers.

11. The method of claim 10 wherein the prepreg bonding layer comprises B-stage prepreg.

12. The method of claim 10 wherein laminating the stacked layers comprises applying heat and pressure to the stacked layers such that resin flows around sides of the metal pallet to bond the sides of the metal pallet to the first portion of the stacked layers.

13. The method of claim 10 wherein the device cutout is sized to receive a heat generating device.

14. The method of claim 10 further comprising plating the front side of the circuit board which includes plating side wall surfaces of the device cutout and the first surface of the metal pallet exposed within the device cavity.

15. The method of claim 10 wherein plating the side wall surfaces of the device cutout forms an interconnect between the metal pallet and any conductive layers intersecting the side wall surfaces of the device cutout.

16. The method of claim 10 further comprising plating the back side of the circuit board to form a continuous planar surface across the back side of the circuit board that is interconnected to the metal pallet.

17. The method of claim 15 further comprising selectively removing a portion of the side wall plating on the side wall surfaces of the device cutout to selectively disconnect one or more of the conductive layers intersecting the side wall surfaces of the device cutout from the metal pallet.

Assignees

• Flex Ltd

Inventors

• Berkel J H
• Robinson Todd
• Vrtis Joan K

Classifications

• H05K2201/10416

  Metallic blocks or heatsinks completely inserted in a PCB · CPC title

• H05K3/0061

  onto a metallic substrate, e.g. a heat sink (heat sinks for electric apparatus H05K7/20) · CPC title

• H05K3/022

  Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates · CPC title

• H05K3/4611

  by laminating two or more circuit boards (H05K3/4652 takes precedence) · CPC title

• H05K3/4644

  by building the multilayer layer by layer, i.e. build-up multilayer circuits (making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602) · CPC title