Printed circuit board including sub-circuit board

Patent metadata

Field	Value
Publication number	US-10477683-B2
Application number	US-201715400606-A
Country	US
Kind code	B2
Filing date	Jan 6, 2017
Priority date	Jan 8, 2016
Publication date	Nov 12, 2019
Grant date	Nov 12, 2019

Abstract

A printed circuit board includes: a core member including a through-hole; a sub-circuit board disposed in the through-hole; a first insulating layer disposed on opposing surfaces of the core member and opposing surfaces of the sub-circuit board; and an insulating material disposed between an inner wall of the through-hole and the sub-circuit board.

First claim

What is claimed is:

1. A printed circuit board, comprising:
a core member comprising a through-hole;
a sub-circuit board disposed in the through-hole, the sub-circuit board comprising
a high density circuit,
stacked vias disposed in laminated layers, and
an electronic device configured to transfer power between the sub-circuit board and a die connected to the printed circuit board;

an outer layer circuit disposed on an outer layer of the sub-circuit board and having a density lower than a density of the high density circuit;
a first insulating layer disposed on opposing surfaces of the core member and opposing surfaces of the sub-circuit board; and
an insulating material disposed between an inner wall of the through-hole and the sub-circuit board,
wherein the electronic device electrically connects a portion of the high density circuit to a portion of the outer layer circuit.

2. The printed circuit board of claim 1 , further comprising a via extending through the core member.

3. The printed circuit board of claim 1 , wherein the sub-circuit board further comprises a second insulating layer.

4. The printed circuit board of claim 3 , wherein the insulating material is made of a material different from a material of the second insulating layer.

5. The printed circuit board of claim 4 , wherein the insulating material is filled with a material of the first insulating layer.

6. The printed circuit board of claim 1 , wherein the first insulating layer further comprises fabric stiffener.

7. The printed circuit board of claim 1 , wherein the sub-circuit board comprises a coreless structure.

8. The printed circuit board of claim 1 , wherein the sub-circuit board further comprises a reinforcing layer comprising fabric stiffener.

9. The printed circuit board of claim 1 , further comprising:
a low density circuit formed on either one or both of the core member and the first insulating layer, and comprising a density lower than the density of the high density circuit.

10. The printed circuit board of claim 9 , wherein the high density circuit comprises the stacked vias.

11. The printed circuit board of claim 9 , further comprising a via or a solder bump connecting the low density circuit with the high density circuit.

12. The printed circuit board of claim 9 , wherein a distance between circuit layers of the high density circuit is less than a distance between circuit layers of the low density circuit.

13. The printed circuit board of claim 9 , wherein a width of the high density circuit is less than a width of the low density circuit.

14. The printed circuit board of claim 9 , wherein the electronic device is encapsulated in the first insulating layer.

15. The printed circuit board of claim 9 , wherein the outer layer circuit comprises a connection pad and a circuit pattern, and wherein the connection pad is formed on the first insulating layer and the circuit pattern connects the high density circuit to the connection pad.

16. The printed circuit board of claim 9 , wherein the low density circuit layer comprises low density circuit layers disposed on the core member and the sub-circuit board.

17. The printed circuit board of claim 1 , wherein the first insulating layer is laminated on the opposing surfaces of the core member and the opposing surfaces of the sub-circuit board.

18. A printed circuit board, comprising:
a first circuit board comprising a first circuit;
a second circuit board disposed in a core member and embedded in the first circuit board between; and
an outer layer circuit disposed on an outer layer of the second circuit board,
wherein the second circuit board comprises a second circuit connected to the first circuit, and the second circuit board further comprises stacked vias disposed in laminated layers, and an electronic device configured to transfer power between the second circuit and a die connected to the printed circuit board, and
wherein the second circuit comprises a circuit patter density that is higher than a circuit patter density of the first circuit and the outer layer circuit, and
wherein the electronic device electrically connects a portion of the second circuit to a portion of the outer layer circuit.

19. The printed circuit board of claim 18 , wherein the insulators comprise:
a laminated insulating layer disposed on opposing surfaces of the core member and opposing surfaces of the second circuit board; and
an insulating material disposed between the first circuit board and the second circuit board.

20. The printed circuit board of claim 18 , wherein the second circuit comprises a circuit layer disposed in a coreless insulating material.

21. The printed circuit board of claim 1 , wherein the electronic device is an active electronic device.

Assignees

• Samsung Electro Mech

Inventors

• Baek Yong-Ho
• Cho Jung-Hyun
• Kook Seung-Yeop

Classifications

• H10P72/7424

  used as a support during the manufacture of self-supporting substrates · CPC title

• H10P72/743

  used as a support during manufacture of interconnect decals or build up layers · CPC title

• H10P72/74

  using temporarily an auxiliary support · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title