Fluidic assembly top-contact LED disk

US10475958B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10475958-B2
Application numberUS-201715674339-A
CountryUS
Kind codeB2
Filing dateAug 10, 2017
Priority dateDec 27, 2011
Publication dateNov 12, 2019
Grant dateNov 12, 2019

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  1. Title

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  5. First independent claim

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Abstract

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Embodiments are related to systems and methods for forming and using a top-contact disk.

First claim

Opening claim text (preview).

What is claimed is: 1. A top-contact light emitting diode (LED), the LED comprising: a lower disk having a first surface and a second surface, wherein the lower disk is formed of a first material selected from a group consisting of: a p-doped material, and an n-doped material; a multiple quantum well (MQW) having a third surface and a fourth surface, and wherein the fourth surface of the MQW is adjacent the first surface of the lower disk; an upper disk having a fifth surface exhibiting and a sixth surface, wherein the fifth surface is opposite the sixth surface, wherein the sixth surface of the upper disk is adjacent the third surface of the MQW, wherein the upper disk is formed of a second material selected from a group consisting of: a p-doped material, and an n-doped material; wherein the second material is doped opposite the first material; and an electrical insulator formed above a first region of the fifth surface of the upper disk, but is not formed above a second region of the fifth surface of the upper disk, wherein the second region includes an area extending to an outer edge of the fifth surface. 2. The LED of claim 1 , wherein the LED further comprises: an opening extending through the upper disk and the MQW such that a portion of the first surface of the lower disk is exposed. 3. The LED of claim 2 , wherein an inner edge of the opening including an edge of the upper disk and an edge of the MQW is covered by the electrical insulator. 4. The LED of claim 2 , wherein the outer edge of the fifth surface of the upper disk over which the electrical insulator is not formed is an upper disk contact region, and wherein the exposed portion of the first surface of the lower disk is a lower disk contact region. 5. The LED of claim 1 , wherein the upper disk is a circular disk. 6. The LED of claim 1 , wherein the lower disk is a circular disk. 7. The LED of claim 1 , wherein the electrical insulator is transparent. 8. The LED of claim 1 , wherein the first material is selected from a group consisting of: p-doped gallium nitride (p-GaN), p-doped aluminum gallium indium phosphide (p-AlGaInP), n-doped gallium nitride (n-GaN), and n-doped aluminum gallium indium phosphide (n-AlGaInP). 9. The LED of claim 1 , wherein the second material is selected from a group consisting of: p-doped gallium nitride (p-GaN), p-doped aluminum gallium indium phosphide (p-AlGaInP), n-doped gallium nitride (n-GaN), and n-doped aluminum gallium indium phosphide (n-AlGaInP). 10. The LED of claim 1 , wherein the first material is the same as the second material. 11. The LED of claim 1 , wherein the LED is incorporated into a direct emission display, and wherein the direct emission display comprises: a substrate with a top surface comprising a plurality of wells, and wherein the LED is deposited into one of the wells; a first electrically conductive line electrically connected to the lower disk; a second electrically conductive line connected to the upper disk; and, a dielectric material interposed between the first electrically conductive line and the second electrically conductive line. 12. The LED of claim 11 , wherein the substrate is a transparent substrate. 13. The LED of claim 11 , wherein the electrical insulator has a center overlying an upper disk center, wherein a portion of the outer perimeter of the fifth surface of the upper disk that is not covered by the electrical insulator is an upper disk contact region formed around a circumference of the fifth surface of the upper disk; and wherein the display further comprises: a dielectric extension formed over a region of the upper disk contact region. 14. The LED of claim 11 , wherein a width of the upper disk is a first diameter, wherein the well into which the LED is deposited has a second diameter; and wherein the first electrically conductive line forms a pair of opposing top disk contact arms overlying a top disk contact arm having a length of x extending over the well, where x is greater than (the second diameter−first diameter)/2. 15. The LED of claim 14 , wherein the lower disk contact region has a third diameter; and wherein the second electrically conductive line forms a bottom disk contact arm overlying the well into which the LED is deposited, each bottom disk contact arm having a length of y extending over the well into which the LED is deposited and the dielectric extension, where y is greater than (the second diameter+the third diameter)/2. 16. The LED of claim 13 , wherein the bottom disk contact arm is orthogonal to both top disk contact arms in the well into which the LED is deposited. 17. A direct emission display comprising: a substrate having a substrate surface, wherein a plurality of wells extend into the substrate and below the substrate surface; and a plurality of stand alone light emitting diodes (LED) each including a first layer formed of a first semiconductor material, a second layer formed of a second semiconductor material, and a multiple quantum well (MQW) disposed between the first layer and the second layer, wherein the stand alone LEDs are formed apart from the substrate, and after formation are each deposited in a respective one of the plurality of wells in the substrate, wherein each of the plurality of stand alone LEDs includes: a first diode surface and a second diode surface, wherein the second diode surface is opposite the first diode surface, and wherein each of the stand alone LEDs includes an anode connection and a cathode connection on the first diode surface. 18. The direct emission display of claim 17 , wherein each of the plurality of wells includes a well bottom and a well sidewall extending from the bottom to the surface of the substrate, and wherein the second diode surface is in contact with well bottom. 19. The direct emission display of claim 17 , wherein each of the plurality of wells includes a well bottom and a well sidewall extending from the well bottom to the surface of the substrate, and wherein no conductive material is deposited between the well sidewall and the respective one of the stand alone LEDs deposited in the well. 20. The direct emission display of claim 17 , wherein each of the plurality of wells includes a well bottom and a well sidewall extending from the well bottom to the surface of the substrate, and wherein no conductive material is deposited between the well bottom and the respective one of the stand alone LEDs deposited in the well. 21. The direct emission display of claim 17 , wherein the first layer has the second diode surface and a first layer surface, wherein the first layer surface is opposite the second diode surface, wherein the first layer surface is substantially planar, and wherein the first diode surface includes a portion of the first layer corresponding to a first electrical contact. 22. The direct emission display of claim 21 , wherein the MQW has a first MQW surface and a second MQW surface, wherein the first MQW surface is adjacent the lower layer surface, and wherein the first electrical contact is on a plane where the first MQW surface and the lower layer surface are in contact. 23. The direct emission display of claim 17 , wherein the first diode surface is non-planar. 24. The direct emission display of claim 17 , wherein the first layer has the second diode surface and a seventh surface, wherein the seventh surface is opposite the second diode surface, wherein the seventh surface is substantially planar,

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What does patent US10475958B2 cover?
Embodiments are related to systems and methods for forming and using a top-contact disk.
Who is the assignee on this patent?
Sharp Laboratories America Inc, Elux Inc
What technology area does this patent fall under?
Primary CPC classification H01L33/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 12 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).