Diodes offering asymmetric stability during fluidic assembly

Patent metadata

Field	Value
Publication number	US-9892944-B2
Application number	US-201615190813-A
Country	US
Kind code	B2
Filing date	Jun 23, 2016
Priority date	Jun 23, 2016
Publication date	Feb 13, 2018
Grant date	Feb 13, 2018

Abstract

Embodiments are related to systems and methods for fluidic assembly, and more particularly to systems and methods for assuring deposition of elements in relation to a substrate.

First claim

What is claimed is:

1. A fluidic assembly system, the system comprising:
a substrate including a plurality of wells;
a suspension including a carrier liquid and a plurality of post enhanced diodes each including a non-metal post extending from a diode structure;
wherein the diode structure includes a bottom surface formed at least in part of a first electrically conductive material and a top surface formed at least in part of a second electrically conductive material; and
wherein a bottom surface of the non-metal post is disposed over the top surface of the of the diode structure such that the second electrically conductive material of the top surface of the diode structure extends along a plane under and beyond the bottom surface of the non-metal post and is between the non-metal post and the first electrically conductive material.

2. The fluidic assembly system of claim 1 , the system further comprising:
a suspension movement device operable to move the suspension over the substrate such that a portion of the plurality of post enhanced diodes deposit in respective ones of the plurality of wells.

3. The fluidic assembly system of claim 1 , wherein the diode structure of the post enhanced diodes further includes:
a first electrical contact formed of a third electrically conductive material disposed on the top surface and unconnected to the non-metal post, wherein the third electrically conductive material is different from the first electrically conducive material, and wherein the first electrical contact is configured to conduct charge to the first electrically conductive material; and
a second electrical contact configured to conduct charge to the second electrically conductive material.

4. The fluidic assembly system of claim 1 , wherein each of the plurality of wells includes a through hole via extending through the substrate from the bottom of the respective well, and wherein a width of a surface of the non-metal post substantially parallel to the top surface of the diode structure is greater than a width of the through hole via.

5. The fluidic assembly system of claim 1 , wherein each of the plurality of wells includes a through hole via extending through the substrate from the bottom of the respective well, and wherein the through hole via is off center from a circular shaped bottom of the respective well.

6. The fluidic assembly system of claim 1 , wherein the diode structure includes a bottom surface, and wherein a maximum width of the bottom surface is less than a maximum width of each of the plurality of wells.

7. The fluidic assembly system of claim 1 , wherein an electrical contact is formed on an interior surface of each of the plurality of wells.

8. The fluidic assembly system of claim 1 , wherein an orientation of each of the plurality of post enhanced diodes where the non-metal post extends away from the substrate is a non-inverted orientation, wherein an orientation of each of the plurality of post enhanced diodes where the non-metal post extends toward the substrate is an inverted orientation, and wherein one of the plurality of post enhanced diodes deposited in a respective well is more mechanically stable in the non-inverted orientation than in the inverted orientation.

9. The fluidic assembly system of claim 1 , wherein an orientation of each of the plurality of post enhanced diodes where the non-metal post extends away from the substrate is a non-inverted orientation, wherein an orientation of each of the plurality of post enhanced diodes where the non-metal post extends toward the substrate is an inverted orientation, and wherein an orientation of one of the plurality of post enhanced diodes in contact with a surface of the substrate is more mechanically stable in the non-inverted orientation than in the inverted orientation.

10. The fluidic assembly system of claim 1 , wherein an orientation of each of the plurality of post enhanced diodes where the non-metal post extends away from the substrate is a non-inverted orientation, wherein an orientation of each of the plurality of post enhanced diodes where the non-metal post extends toward the substrate is an inverted orientation, and wherein the substrate further includes:
at least one groove configured such that an orientation of one of the plurality of post enhanced diodes traversing the groove is more mechanically stable in the non-inverted orientation than in the inverted orientation.

11. The fluidic assembly system of claim 10 , wherein the groove extends into the substrate with a leading edge exhibiting a slope greater than a trailing edge, and wherein upon moving the suspension over the substrate one of the post enhanced diodes crosses the trailing edge before crossing the leading edge.

12. The fluidic assembly system of claim 10 , wherein a depth of the groove into the substrate is less than a distance from an edge of the top surface of the diode structure to an edge of the non-metal post.

13. The fluidic assembly system of claim 10 , wherein a width of the groove at a surface of the substrate is less than a distance from an edge of the top surface of the diode structure to an edge of the non-metal post.

14. The fluidic assembly system of claim 1 , wherein a pair of the first electrically conductive material and the second electrically are either: a p-doped semiconductor material and an n-doped semiconductor material, respectively; or an n-doped semiconductor material and a p-doped semiconductor material, respectively.

15. A post enhanced diode comprising:
a planar top surface formed at least in part of a first electrically conductive material;
a planar bottom surface formed at least in part of a second electrically conductive material;
a post extending from the planar top surface, wherein the planar top surface is between the post and the planar bottom surface;
a first electrical contact formed of a third electrically conductive material disposed on the planar top surface and unconnected to the post, wherein the third electrically conductive material is different from the first electrically conducive material, and wherein the first electrical contact is configured to conduct charge to the first electrically conductive material; and
a second electrical contact configured to conduct charge to the second electrically conductive material.

16. The post enhanced diode of claim 15 , wherein the top surface exhibits a first maximum width, wherein a surface of the post that is substantially parallel to the top surface exhibits a second maximum width, and wherein the first maximum width is at least two times the second maximum width.

17. The post enhanced diode of claim 15 , wherein the post exhibits a height extending from the top surface to the surface of the post that is substantially parallel to the top surface, wherein a distance between the top surface and the bottom surface is a thickness, and wherein the thickness-to-height ratio is in a range of 1:0.6 to 1:4.

18. The post enhanced diode of claim 15 , wherein the top surface exhibits a maximum width, wherein a distance between the top surface and the bottom surface is a thickness, and wherein the maximum width-to-thickness aspect ratio is in a range of 5:1 to 50:1.

19. The post enhanced diode of claim 15 , wherein the post is the first electrical contact.

20. The post enhanced diode of claim 15 , wherein the post is formed of an insulator material.

21. The post enhanced diode of claim 15 , wherein the top surface has a shape selected from a group consisting of: a c

Assignees

• Sharp Laboratories America Inc
• Sharp Kk

Inventors

• Schuele Paul John
• Heine David Robert
• Crowder Mark Albert
• Garner Sean Mathew
• Zhan Changqing
• Shinde Avinash Tukaram
• Sasaki Kenji Alexander
• Ulmer Kurt Michael

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W72/0198

  batch processes · CPC title

• H10H29/142 Primary

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

• H10P72/16 Primary

  Trays for chips · CPC title

• H10P72/0438 Primary

  Apparatus for making assemblies not otherwise provided for, e.g. package constructions · CPC title